A 2.3-mW, 1-GHz, 8-bit fully time-based two-step ADC using a high-linearity dynamic VTC

K Ohhata - IEEE Journal of Solid-State Circuits, 2019 - ieeexplore.ieee.org
A novel fully time-based two-step analog-to-digital converter (ADC) is proposed. Two time-
based ADCs (TB ADCs) are used for coarse ADC (CADC) and fine ADC (FADC), resulting in …

Femtosecond-precision electronic clock distribution in CMOS chips by injecting frequency comb-extracted photocurrent pulses

M Hyun, H Chung, W Na, J Kim - Nature Communications, 2023 - nature.com
A clock distribution network (CDN) is a ubiquitous on-chip element that provides
synchronized clock signals to all different circuit blocks in the chip. To maximize the chip …

Review, survey, and benchmark of recent digital LDO voltage regulators

Z Wang, SJ Kim, K Bowman… - 2022 IEEE Custom …, 2022 - ieeexplore.ieee.org
This paper presents a review of the recent digital low-dropout voltage regulators (DLDOs).
We have reviewed them in five aspects: control laws, triggering methods, power-FET circuit …

2.1 Summit and Sierra: designing AI/HPC supercomputers

JA Kahle, J Moreno, D Dreps - 2019 IEEE International Solid …, 2019 - ieeexplore.ieee.org
The Summit and Sierra Supercomputer Systems, deployed in 2018 at the Department of
Energy (DOE) National Laboratories, Oak Ridge (ORNL) and Lawrence Livermore (LLNL) …

A survey of compute nodes with 100 TFLOPS and beyond for supercomputers

J Chang, K Lu, Y Guo, Y Wang, Z Zhao… - CCF Transactions on …, 2024 - Springer
With the Frontier supercomputer ranked first on the Top500 list, it marks the era of exascale
computing power for supercomputers, employing the compute nodes with double-precision …

PowerScout: A security-oriented power delivery network modeling framework for cross-domain side-channel analysis

H Zhu, X Guo, Y Jin, X Zhang - 2020 Asian Hardware Oriented …, 2020 - ieeexplore.ieee.org
The growing complexity of modern electronic systems often leads to the design of more
sophisticated power delivery networks (PDNs). Similar to other system-level shared …

A bi-directional, zero-latency adaptive clocking circuit in a 28-nm wide AVFS system

W Shan, W Dai, L Wan, M Lu, L Shi… - IEEE Journal of Solid …, 2019 - ieeexplore.ieee.org
Resilient circuits based on in situ timing monitoring adaptive voltage–frequency scaling
(AVFS) eliminate excess time margins caused by process, voltage, and temperature (PVT) …

A Metastability Risk Prediction and Mitigation Technique for Clock-Domain Crossing With Single-Stage Synchronizer in Near-Threshold-Voltage Multivoltage …

C Lin, W He, Y Sun, L Shao, B Zhang… - IEEE Journal of Solid …, 2023 - ieeexplore.ieee.org
For a network-on-chip (NoC) with multiple voltage/frequency domains, metastability hurts the
reliability during the clock-domain crossing, especially in the near-threshold-voltage (NTV) …

Evaluating the Energy Measurements of the IBM POWER9 On-Chip Controller

H Tröpgen, M Bielert, T Ilsche - Proceedings of the 2023 ACM/SPEC …, 2023 - dl.acm.org
Dependable power measurements are the backbone of energy-efficient computing systems.
The IBM PowerNV platform offers such power measurements through an embedded …

Stability of on-chip power delivery systems with multiple low-dropout regulators

A Ciprut, EG Friedman - … on Very Large Scale Integration (VLSI …, 2019 - ieeexplore.ieee.org
Low-dropout (LDO) voltage regulators have become prominent elements of on-chip power
delivery systems due to the increasing importance of separate voltage domains, fast …