Design of a high-performance system for secure image communication in the internet of things
Image or video exchange over the Internet of Things (IoT) is a requirement in diverse
applications, including smart health care, smart structures, and smart transportations. This …
applications, including smart health care, smart structures, and smart transportations. This …
Efficient algorithm adaptations and fully parallel hardware architecture of H. 265/HEVC intra encoder
The growing demand for high-performance ultra-high-definition video coding leads to H.
265/high-efficiency video coding (HEVC), where the increased computational complexity …
265/high-efficiency video coding (HEVC), where the increased computational complexity …
A hardware architecture for better portable graphics (BPG) compression encoder
U Albalawi, SP Mohanty… - 2015 IEEE international …, 2015 - ieeexplore.ieee.org
This paper proposes a hardware architecture for the newly introduced Better Portable
Graphics (BPG) compression algorithm. Since its introduction in 1987, the Joint …
Graphics (BPG) compression algorithm. Since its introduction in 1987, the Joint …
3D point cloud encryption through chaotic mapping
X Jin, Z Wu, C Song, C Zhang, X Li - … , Xi´ an, China, September 15-16 …, 2016 - Springer
Three dimensional (3D) contents such as 3D point clouds, 3D meshes and 3D surface
models are increasingly growing and being widely spread into the industry and our daily life …
models are increasingly growing and being widely spread into the industry and our daily life …
Fully pipelined real time hardware solution for high efficiency video coding (HEVC) intra prediction
F Amish, EB Bourennane - Journal of Systems Architecture, 2016 - Elsevier
A fully pipelined hardware accelerator for the High Efficiency Video Coding (HEVC) intra
prediction is presented in this paper in order to reduce the computation complexity coming …
prediction is presented in this paper in order to reduce the computation complexity coming …
High throughput hardware design for AV1 Paeth and smooth intra modes
Developed by AOMedia industry consortium and released in June 2018, AV1 is an open-
source and royalty-free video coding format. The main goal of AV1 is to deliver substantial …
source and royalty-free video coding format. The main goal of AV1 is to deliver substantial …
High-throughput HEVC intrapicture prediction hardware design targeting UHD 8K videos
This paper presents a high-throughput hardware architecture for the HEVC intrapicture
prediction targeting the processing of UHD 8K (7680× 4320 pixels) videos at 120 frames per …
prediction targeting the processing of UHD 8K (7680× 4320 pixels) videos at 120 frames per …
VLSI architecture of HEVC intra prediction for 8K UHDTV applications
This paper presents an efficient VLSI architecture of intra prediction for 8K× 4K HEVC
decoder. It supports all 35 intra prediction modes and prediction sizes ranging from 4× 4 to …
decoder. It supports all 35 intra prediction modes and prediction sizes ranging from 4× 4 to …
A compact 32-pixel TU-oriented and SRAM-free intra prediction VLSI architecture for HEVC decoder
Y Fan, G Tang, X Zeng - IEEE Access, 2019 - ieeexplore.ieee.org
In the High Efficiency Video Coding (HEVC), a variety of CU sizes and intra prediction
modes significantly improve coding efficiency, but also bring higher computational …
modes significantly improve coding efficiency, but also bring higher computational …
UHD 8K energy-quality scalable HEVC intra-prediction SAD unit hardware using optimized and configurable imprecise adders
Real-time digital video coding became a mandatory feature in current consumer electronic
devices due to the popularization of video applications. However, efficiently encoding videos …
devices due to the popularization of video applications. However, efficiently encoding videos …