A survey of microarchitectural side-channel vulnerabilities, attacks, and defenses in cryptography

X Lou, T Zhang, J Jiang, Y Zhang - ACM Computing Surveys (CSUR), 2021 - dl.acm.org
Side-channel attacks have become a severe threat to the confidentiality of computer
applications and systems. One popular type of such attacks is the microarchitectural attack …

Translation leak-aside buffer: Defeating cache side-channel protections with {TLB} attacks

B Gras, K Razavi, H Bos, C Giuffrida - 27th USENIX Security Symposium …, 2018 - usenix.org
To stop side channel attacks on CPU caches that have allowed attackers to leak secret
information and break basic security mechanisms, the security community has developed a …

A survey of microarchitectural timing attacks and countermeasures on contemporary hardware

Q Ge, Y Yarom, D Cock, G Heiser - Journal of Cryptographic Engineering, 2018 - Springer
Microarchitectural timing channels expose hidden hardware states though timing. We survey
recent attacks that exploit microarchitectural features in shared hardware, especially as they …

Lord of the ring (s): Side channel attacks on the {CPU}{On-Chip} ring interconnect are practical

R Paccagnella, L Luo, CW Fletcher - 30th USENIX Security Symposium …, 2021 - usenix.org
We introduce the first microarchitectural side channel attacks that leverage contention on the
CPU ring interconnect. There are two challenges that make it uniquely difficult to exploit this …

Truspy: Cache side-channel information leakage from the secure world on arm devices

N Zhang, K Sun, D Shands, W Lou… - Cryptology ePrint Archive, 2016 - eprint.iacr.org
As smart, embedded devices are increasingly integrated into our daily life, the security of
these devices has become a major concern. The ARM processor family, which powers more …

{SafeBricks}: shielding network functions in the cloud

R Poddar, C Lan, RA Popa, S Ratnasamy - 15th USENIX Symposium on …, 2018 - usenix.org
With the advent of network function virtualization (NFV), outsourcing network processing to
the cloud is growing in popularity amongst enterprises and organizations. Such outsourcing …

Eliminating timing side-channel leaks using program repair

M Wu, S Guo, P Schaumont, C Wang - Proceedings of the 27th ACM …, 2018 - dl.acm.org
We propose a method, based on program analysis and transformation, for eliminating timing
side channels in software code that implements security-critical applications. Our method …

{Side-Channel} Attacks on Optane Persistent Memory

S Liu, S Kanniwadi, M Schwarzl, A Kogler… - 32nd USENIX Security …, 2023 - usenix.org
There is a constant evolution of technology for cloud environments, including the
development of new memory storage technology, such as persistent memory. The newly …

FaCT: a DSL for timing-sensitive computation

S Cauligi, G Soeller, B Johannesmeyer… - Proceedings of the 40th …, 2019 - dl.acm.org
Real-world cryptographic code is often written in a subset of C intended to execute in
constant-time, thereby avoiding timing side channel vulnerabilities. This C subset eschews …

Mapping the Intel last-level cache

Y Yarom, Q Ge, F Liu, RB Lee, G Heiser - Cryptology ePrint Archive, 2015 - eprint.iacr.org
Modern Intel processors use an undisclosed hash function to map memory lines into last-
level cache slices. In this work we develop a technique for reverse-engineering the hash …