With the advent of portable devices, the demand for static random-access memory (SRAM)
is increasing with large use of SRAM in System on Chip and high-performance VLSI circuits …

All battery-operated devices require primary memory that responds fast. By virtue of its high
speed and performance, Static RAM is commonly used as cache memory and main memory …

A quantitative and yield analysis of different types of sense amplifiers has been done.
Furthermore, power reduction techniques such as sleep transistor technique, footer stack …

The display hardware concentrates on planning low power control gadgets due to the
utilization of versatile battery-powered gadgets. Ultra low energy process of memory clusters …

For SRAM power, stability, delay and area are the major concerns. And they are trade-offs to
each other. But all are important and should be in acceptable range. In this paper we mainly …

In this paper, design analysis of single-bit cache memory architecture has been done. The
proposed single-bit cache memory architecture comprises of the write driver circuit, static …

A quantitative and yield analysis of single-bit cache memory architecture with different types
of sense amplifiers such as voltage-mode differential sense amplifier (VMDSA), has been …

This chapter focuses on a quantitative yield analysis and implementation of a single-bit
cache memory architecture. The single-bit cache memory architecture comprises a write …

An ultra-low leakage static random-access memory (SRAM) cell structure with 8 transistors
is proposed in this paper. Compared to the 6T SRAM and other existing 8T SRAM cells …

A quantitative and yield analysis of single-bit cache memory architecture with different sense
amplifiers such as voltage mode sense amplifier and charge-transfer sense amplifier has …