Compact modeling technology for the simulation of integrated circuits based on graphene field‐effect transistors

F Pasadas, PC Feijoo, N Mavredakis… - Advanced …, 2022 - Wiley Online Library
The progress made toward the definition of a modular compact modeling technology for
graphene field‐effect transistors (GFETs) that enables the electrical analysis of arbitrary …

A carbon nano-tube field effect transistor based stable, low-power 8T static random access memory cell with improved write access time

A Sachdeva, D Kumar, E Abbasian - AEU-International Journal of …, 2023 - Elsevier
Carbon nanotube field effect transistor (CNTFET) is swiftly becoming an alternative to
conventional CMOS transistors due to superior transport properties, improved current …

Carbon nanotube transistors scaled to a 40-nanometer footprint

Q Cao, J Tersoff, DB Farmer, Y Zhu, SJ Han - Science, 2017 - science.org
The International Technology Roadmap for Semiconductors challenges the device research
community to reduce the transistor footprint containing all components to 40 nanometers …

CNTFET-based design of ternary logic gates and arithmetic circuits

S Lin, YB Kim, F Lombardi - IEEE transactions on …, 2009 - ieeexplore.ieee.org
This paper presents a novel design of ternary logic gates using carbon nanotube (CNT)
FETs (CNTFETs). Ternary logic is a promising alternative to the conventional binary logic …

A compact SPICE model for carbon-nanotube field-effect transistors including nonidealities and its application—Part II: Full device model and circuit performance …

J Deng, HSP Wong - IEEE Transactions on Electron Devices, 2007 - ieeexplore.ieee.org
This paper presents a complete circuit-compatible compact model for single-walled carbon-
nanotube field-effect transistors (CNFETs) as an extension to Part 1 of this two-part paper …

A compact virtual-source model for carbon nanotube FETs in the sub-10-nm regime—Part I: Intrinsic elements

CS Lee, E Pop, AD Franklin… - IEEE transactions on …, 2015 - ieeexplore.ieee.org
We present a data-calibrated compact model of carbon nanotube (CNT) FETs (CNTFETs)
based on the virtual-source (VS) approach, describing the intrinsic current-voltage and …

Design of energy-efficient and robust ternary circuits for nanotechnology

MH Moaiyeri, A Doostaregan, K Navi - IET Circuits, Devices & Systems, 2011 - IET
Novel high-performance ternary circuits for nanotechnology are presented here. Each of
these carbon nanotube field-effect transistor (CNFET)-based circuits implements all the …

Emerging physical unclonable functions with nanotechnology

Y Gao, DC Ranasinghe, SF Al-Sarawi, O Kavehei… - IEEE …, 2016 - ieeexplore.ieee.org
Physical unclonable functions (PUFs) are increasingly used for authentication and
identification applications as well as the cryptographic key generation. An important feature …

A logic synthesis methodology for low-power ternary logic circuits

S Kim, SY Lee, S Park, KR Kim… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
We propose a logic synthesis methodology with a novel low-power circuit structure for
ternary logic. The proposed methodology synthesizes a ternary function as a ternary logic …

A Review on the Study of Temperature Effects in the Design of A/D Circuits based on CNTFET

R Marani, AG Perri - Current Nanoscience, 2019 - ingentaconnect.com
In this paper, we review a procedure to study the effects of temperature in the design of A/D
circuits based on CNTFETs. At first, we briefly describe a compact model, already proposed …