A review of new time-to-digital conversion techniques

S Tancock, E Arabul, N Dahnoun - IEEE transactions on …, 2019 - ieeexplore.ieee.org
Time-to-digital converters (TDCs) are vital components in time and distance measurement
and frequency-locking applications. There are many architectures for implementing TDCs …

[HTML][HTML] Time-to-digital conversion techniques: A survey of recent developments

J Szyduczyński, D Kościelnik, M Miśkowicz - Measurement, 2023 - Elsevier
Time-to-digital converters (TDCs) are key components of time-mode circuits and enablers for
digital processing of analog signals encoded in time. Since design of time-mode circuits …

A successive approximation time-to-digital converter with single set of delay lines for time interval measurements

J Szyduczyński, D Kościelnik, M Miśkowicz - Sensors, 2019 - mdpi.com
The paper is focused on design of time-to-digital converters based on successive
approximation (SA-TDCs—Successive Approximation TDCs) using binary-scaled delay …

A 12-bit digital-to-time converter (DTC) with sub-ps-level resolution using current DAC and differential switch for time-to-digital converter (TDC)

S Alahdab, A Mäntyniemi… - 2012 IEEE International …, 2012 - ieeexplore.ieee.org
This paper describes a digital-to-time converter (DTC) architecture that can be used as
interpolator in a time-to-digital converter (TDC). The new architecture of the DTC achieves …

Time-to-digital converters based on event-driven successive charge redistribution: A theoretical approach

D Kościelnik, M Miśkowicz - Measurement, 2012 - Elsevier
Due to reduction of supply voltage and improving the time resolution with continued down
scaling of CMOS technology, encoding signal values in the time domain has become a …

An 8‐bit digital‐to‐time converter with pre‐skewing and time interpolation

DJ Lee, F Yuan, GN Khan… - IET Circuits, Devices & …, 2021 - Wiley Online Library
This study presents an 8‐bit delay line digital‐to‐time converter (DTC) with pre‐skewing and
digital time interpolation. Pre‐skewing that lowers the per‐stage‐delay of delay lines beyond …

Successive approximation time-to-digital converters

J Szyduczyński, D Kościelnik, K Jurasz… - … Conference on Event …, 2020 - ieeexplore.ieee.org
The successive approximation scheme belongs to fundamental and most successful
methods of analog-to-digital conversion that has been implemented commercially for …

A time-to-digital converter (TDC) with a 13-bit cyclic time domain successive approximation interpolator with sub-ps-level resolution using current DAC and differential …

S Alahdab, A Mäntyniemi… - 2013 IEEE 56th …, 2013 - ieeexplore.ieee.org
A new architecture of the time-to-digital converter (TDC) aims at adjustable sub-ps-level
resolution with high linearity in ms-level dynamic range. To achieve sub-ps-level resolution …

Optimizing time-to-digital converter architecture for successive approximation time measurements

D Kościelnik, M Miśkowicz… - 2013 IEEE Nordic …, 2013 - ieeexplore.ieee.org
The paper is focused on the discussion of various variants of time-to-digital converter
architectures for successive approximation time measurements (SA-TDC) realized strictly in …

Systematization and Comparison of the Binary Successive Approximation Variants

K Jurasz, D Kościelnik, J Szyduczyński, M Miśkowicz - Sensors, 2021 - mdpi.com
This paper presents a systematization and a comparison of the binary successive
approximation (SA) variants. Three different variants are distinguished and all of them are …