Method and system for detecting hardware trojans and unintentional design flaws
The present disclosure includes systems and methods relating to information flow tracking
and detection of unintentional design flaws of digital devices and microprocessor systems. In …
and detection of unintentional design flaws of digital devices and microprocessor systems. In …
Automatic error diagnosis and correction for RTL designs
A computer executable tool facilitates integrated circuit design and debugging by working
directly at the Register Transfer Level, where most design activities take place. The tool …
directly at the Register Transfer Level, where most design activities take place. The tool …
Method, system and computer program for hardware design debugging
S Safarpour, A Veneris - US Patent 8,751,984, 2014 - Google Patents
(57) ABSTRACT A plurality of diagnosis methods are provided for enabling hardware
debugging. A first diagnosis method enables hard ware debugging by means of time …
debugging. A first diagnosis method enables hard ware debugging by means of time …
Systems and methods for security and safety fault analysis using information flow
Z Blair, JK Oberg, J Valamehr - US Patent 10,558,771, 2020 - Google Patents
The present disclosure includes systems and methods relating to information flow and
analyzing faults in integrated circuits for digital devices and microprocessor systems …
analyzing faults in integrated circuits for digital devices and microprocessor systems …
Method to identify and generate critical timing path test vectors
IR Govett, J Sargis, DM Seitzer, DJ Singley… - US Patent App. 11 …, 2008 - Google Patents
A method of testing critical paths in integrated circuits begins by simulating at least one
operation of an integrated circuit chip design to produce chip timing data. Next, critical paths …
operation of an integrated circuit chip design to produce chip timing data. Next, critical paths …
System and method for implementing application code from application requirements
T Weigert, FJ Weil - US Patent 9,858,046, 2018 - Google Patents
An input/output module receives application requirements and parameters and a processing
module implements production of application code. An architecture code level design phase …
module implements production of application code. An architecture code level design phase …
Methods, systems, and computer program product for implementing deadlock detection with formal verification techniques in an electronic design
VM Purri, MD Pedneau, L Lundgren… - US Patent 10,108,767, 2018 - Google Patents
Disclosed are methods, systems, and articles of manufacture for implementing deadlock
detection with formal verification techniques in an electronic design. These techniques …
detection with formal verification techniques in an electronic design. These techniques …
System, method and computer program for determining fixed value, fixed time, and stimulus hardware diagnosis
SA Safarpour, DPN Smith, YS Yang… - US Patent App. 13 …, 2012 - Google Patents
US20120198399A1 - System, method and computer program for determining fixed value,
fixed time, and stimulus hardware diagnosis - Google Patents US20120198399A1 - System …
fixed time, and stimulus hardware diagnosis - Google Patents US20120198399A1 - System …
Methods for automatically generating fault mitigation strategies for electronic system designs
P Sundararajan, JD Corbett, DW Bennett… - US Patent …, 2011 - Google Patents
Approaches for generating a design of an electronic system are disclosed. In one approach,
for each of one or more components of a first specification of the design, an error mitigation …
for each of one or more components of a first specification of the design, an error mitigation …
Automatic approximation of assumptions for formal property verification
AM Dsouza - US Patent 8,813,007, 2014 - Google Patents
One embodiment provides a system, comprising methods and apparatuses, for simplifying a
set of assumptions for a circuit design, and for verifying the circuit design by determining …
set of assumptions for a circuit design, and for verifying the circuit design by determining …