Low voltage analog circuit design techniques: A tutorial
S Yan, E Sanchez-Sinencio - IEICE Transactions on Fundamentals …, 2000 - search.ieice.org
Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In
particular,(i) technology considerations;(ii) transistor model capable to provide performance …
particular,(i) technology considerations;(ii) transistor model capable to provide performance …
Low-voltage super class AB CMOS OTA cells with very high slew rate and power efficiency
AJ López-Martín, S Baswa… - IEEE Journal of Solid …, 2005 - ieeexplore.ieee.org
A simple technique to achieve low-voltage power-efficient class AB operational
transconductance amplifiers (OTAs) is presented. It is based on the combination of class AB …
transconductance amplifiers (OTAs) is presented. It is based on the combination of class AB …
Low voltage analog circuit design techniques
SS Rajput, SS Jamuar - IEEE Circuits and Systems Magazine, 2002 - ieeexplore.ieee.org
Analog signal processing is fast and can address real world problems. The applications of
battery powered analog and mixed mode electronic devices require designing analog …
battery powered analog and mixed mode electronic devices require designing analog …
SAW-less analog front-end receivers for TDD and FDD
I Fabiano, M Sosio, A Liscidini… - IEEE Journal of Solid …, 2013 - ieeexplore.ieee.org
A multistandard SAW-less receiver is designed exploring a current-mode architecture. A
class-AB common-gate transformer-based low-noise transconductor amplifier (LNTA) is …
class-AB common-gate transformer-based low-noise transconductor amplifier (LNTA) is …
A 0.9-V 0.5-/spl mu/A rail-to-rail CMOS operational amplifier
T Stockstad, H Yoshizawa - IEEE Journal of Solid-State Circuits, 2002 - ieeexplore.ieee.org
A 0.9-V 0.5-/spl mu/A, rail-to-rail CMOS operational amplifier designed with weak inversion
techniques is presented. Depletion-mode nMOS transistors buffer a bulk-driven pMOS …
techniques is presented. Depletion-mode nMOS transistors buffer a bulk-driven pMOS …
[图书][B] Low power and low voltage circuit design with the FGMOS transistor
E Rodriguez-Villegas - 2006 - books.google.com
Motivated by consumer demand for smaller, more portable electronic devices that offer more
features and operate for longer on their existing battery packs, cutting edge electronic …
features and operate for longer on their existing battery packs, cutting edge electronic …
A two-phase switching hybrid supply modulator for RF power amplifiers with 9% efficiency improvement
PY Wu, PKT Mok - IEEE Journal of Solid-State Circuits, 2010 - ieeexplore.ieee.org
A hybrid supply modulator consisting of a parallel operation of a high-drive, low output
impedance, wideband class-AB linear amplifier and a high-efficiency, wideband, low-ripple …
impedance, wideband class-AB linear amplifier and a high-efficiency, wideband, low-ripple …
A floating-gate-based field-programmable analog array
A Basu, S Brink, C Schlottmann… - IEEE Journal of Solid …, 2010 - ieeexplore.ieee.org
A field-programmable analog array (FPAA) with 32 computational analog blocks (CABs) and
occupying 3× 3 mm 2 in 0.35-μm CMOS is presented. Each CAB has a wide variety of …
occupying 3× 3 mm 2 in 0.35-μm CMOS is presented. Each CAB has a wide variety of …
A single-channel, 600-MS/s, 12-b, ringamp-based pipelined ADC in 28-nm CMOS
Achieving high linearity and bandwidth with good power efficiency makes the design of
ADCs in deep nanoscale CMOS processes very challenging, as the constraints of low …
ADCs in deep nanoscale CMOS processes very challenging, as the constraints of low …
A free but efficient low-voltage class-AB two-stage operational amplifier
J Ramírez-Angulo, RG Carvajal… - … on Circuits and …, 2006 - ieeexplore.ieee.org
A simple and efficient low-voltage two-stage operational amplifier with Class-AB output
stage is introduced. It has a large effective output current boosting factor (/spl sim/50) and …
stage is introduced. It has a large effective output current boosting factor (/spl sim/50) and …