LegUp: An open-source high-level synthesis tool for FPGA-based processor/accelerator systems
It is generally accepted that a custom hardware implementation of a set of computations will
provide superior speed and energy efficiency relative to a software implementation …
provide superior speed and energy efficiency relative to a software implementation …
Automating application-driven customization of ASIPs: A survey
The rapid advancements and stringent requirements of modern embedded computing
systems have led to a surge in the demand for customized processors that can efficiently …
systems have led to a surge in the demand for customized processors that can efficiently …
Adjustable-cost overlays for runtime compilation
Previous work has shown that virtual architectures, or overlays, can greatly reduce lengthy
FPGA compile times by providing application-specialized resources along with a flexible …
FPGA compile times by providing application-specialized resources along with a flexible …
Constraint programming approach to reconfigurable processor extension generation and application compilation
K Martin, C Wolinski, K Kuchcinski, A Floch… - ACM transactions on …, 2012 - dl.acm.org
In this article, we present a constraint programming approach for solving hard design
problems present when automatically designing specialized processor extensions …
problems present when automatically designing specialized processor extensions …
Algorithms for Improving the Automatically Synthesized Instruction Set of an Extensible Processor
P Sovietov - arXiv preprint arXiv:2401.00772, 2024 - arxiv.org
Processors with extensible instruction sets are often used today as programmable hardware
accelerators for various domains. When extending RISC-V and other similar extensible …
accelerators for various domains. When extending RISC-V and other similar extensible …
Synthesis of processor instruction sets from high-level ISA specifications
As processors continue to get exponentially cheaper for end users following Moore's law,
the costs involved in their design keep growing, also at an exponential rate. The reason is …
the costs involved in their design keep growing, also at an exponential rate. The reason is …
Soft core processor generated based on the machine code of the application
A Ziebinski, S Swierc - Journal of Circuits, Systems and Computers, 2016 - World Scientific
Currently embedded system designs aim to improve areas such as speed, energy efficiency
and the cost of an application. Application-specific instruction set extensions on …
and the cost of an application. Application-specific instruction set extensions on …
[图书][B] Legup: open-source high-level synthesis research framework
AC Canis - 2015 - search.proquest.com
The rate of increase in computing performance has been slowing due to the end of
processor frequency scaling and diminishing returns from multiple cores. We believe the …
processor frequency scaling and diminishing returns from multiple cores. We believe the …
Adam: Automated design analysis and merging for speeding up fpga development
This paper introduces ADAM, an approach for merging multiple FPGA designs into a single
hardware design, so that multiple place-and-route tasks can be replaced by a single task to …
hardware design, so that multiple place-and-route tasks can be replaced by a single task to …
Design of asynchronous microprocessor for power proportionality
M Rykunov - 2014 - theses.ncl.ac.uk
Microprocessors continue to get exponentially cheaper for end users following Moore's law,
while the costs involved in their design keep growing, also at an exponential rate. The …
while the costs involved in their design keep growing, also at an exponential rate. The …