Synthesis of Petri nets into FPGA with operation flexible memories
A Bukowiec, M Adamski - 2012 IEEE 15th International …, 2012 - ieeexplore.ieee.org
In this paper a new method of Petri net array-based synthesis is proposed. The method is
based on the structured encoding of places by means of using minimal numbers of bits …
based on the structured encoding of places by means of using minimal numbers of bits …
An FPGA synthesis of the distributed control systems designed with Petri nets
A Bukowiec, P Mróz - 2012 IEEE 3rd International Conference …, 2012 - ieeexplore.ieee.org
The paper describes a new method for the synthesis of the application specific distributed
control systems, constructed using the FPGA devices. The initial steps of the proposed …
control systems, constructed using the FPGA devices. The initial steps of the proposed …
[PDF][PDF] Synthesis of finite state machines for programmable devices based on multi-level implementation
A Bukowiec - 2008 - zbc.uz.zgora.pl
New architectures of FPGA devices combine different type of logic elements like look-up
tables, flip-flops and memory blocks. But standard synthesis methods utilize only look-up …
tables, flip-flops and memory blocks. But standard synthesis methods utilize only look-up …
[PDF][PDF] Implementation of algorithm of Petri nets distributed synthesis into FPGA
In the paper an implementation of algorithm of Petri net array-based synthesis is presented.
The method is based on decomposition of colored interpreted macro Petri net into subnets …
The method is based on decomposition of colored interpreted macro Petri net into subnets …
[PDF][PDF] Synthesis of macro Petri nets into FPGA with distributed memories
A Bukowiec, M Adamski - International Journal of Electronics and …, 2012 - bibliotekanauki.pl
In this paper a new method of Petri net array-based synthesis is proposed. The method is
based on decomposition of colored interpreted macro Petri net into state machine subnets …
based on decomposition of colored interpreted macro Petri net into state machine subnets …
Petri net decomposition approach for partial reconfiguration of logic controllers
M Wegrzyn - IFAC Proceedings Volumes, 2006 - Elsevier
In the paper design method of Reprogrammable Logic Controllers oriented on partial
reconfiguration is presented. The Controller is specified by Interpreted Petri net. The Petri …
reconfiguration is presented. The Controller is specified by Interpreted Petri net. The Petri …
Logic synthesis for FPGAs of interpreted Petri net with common operation memory
A Bukowiec, M Adamski - IFAC Proceedings Volumes, 2012 - Elsevier
The method of synthesis of the logic circuit of interpreted Petri net is proposed in this paper.
Proposed method is based on the minimal encoding of places. Places are encoded in …
Proposed method is based on the minimal encoding of places. Places are encoded in …
[PDF][PDF] Distributed control systems design as petri nets for fpgas
A Bukowiec - International Journal of Design, Analysis and Tools …, 2013 - researchgate.net
The paper describes a new method for the implementation of the application specific
distributed control systems, constructed using the FPGA devices. The initial steps of the …
distributed control systems, constructed using the FPGA devices. The initial steps of the …
Dual synthesis of petri net based dependable logic controllers for safety critical systems
In the paper, implementation of application specific logic controller for safety critical systems
by means of Petri nets is described. The solution is based on duplicated main control unit …
by means of Petri nets is described. The solution is based on duplicated main control unit …
Architectural Synthesis of Petri Nets
A Bukowiec - Design of Reconfigurable Logic Controllers, 2016 - Springer
New methods of Petri net array-based architectural synthesis are presented. Methods are
based on the parallel decomposition of control algorithm into concurrently working state …
based on the parallel decomposition of control algorithm into concurrently working state …