Novo-G#: Large-scale reconfigurable computing with direct and programmable interconnects
AD George, MC Herbordt, H Lam… - 2016 IEEE High …, 2016 - ieeexplore.ieee.org
While High-Performance Computing is ever more pervasive and effective, computing
capability is currently only a small fraction of what is needed. Three fundamental issues …
capability is currently only a small fraction of what is needed. Three fundamental issues …
Design of 3D FFTs with FPGA clusters
The three dimensional Fast Fourier Transform (3D FFT) is widely applied in various scientific
applications. Distributed 3D FFTs require global communication: this becomes a serious …
applications. Distributed 3D FFTs require global communication: this becomes a serious …
Si-Kintsugi: Towards Recovering Golden-Like Performance of Defective Many-Core Spatial Architectures for AI
The growing demand for higher compute and memory capacity driven by artificial
intelligence (AI) applications pushes higher core counts in modern systems. Many-core …
intelligence (AI) applications pushes higher core counts in modern systems. Many-core …
Collective communication on FPGA clusters with static scheduling
FPGA-centric clouds and clusters provide direct and programmable interconnects with
obvious benefits for communication latency and bandwidth. One rarely studied aspect of DPI …
obvious benefits for communication latency and bandwidth. One rarely studied aspect of DPI …
[PDF][PDF] Towards Low-Latency Communication on FPGA Clusters with 3D FFT Case Study
FPGA-based clusters are excellent candidates for future High Performance Computing
systems as they allow for the integration of communication and computation in the same …
systems as they allow for the integration of communication and computation in the same …
A survey on emerging issues in interconnection networks
Nowadays, the interconnection network is considered as an important architectural choice
for the future parallel system in many processors owing to the scalable nature of the …
for the future parallel system in many processors owing to the scalable nature of the …
Addressing a new class of reliability threats in 3-D network-on-chips
Network-on-chips (NoCs) are vulnerable to transient and permanent faults caused by
thermal violations, aging effects, component wear out, or even transient fault sources …
thermal violations, aging effects, component wear out, or even transient fault sources …
Joint static and dynamic traffic scheduling in data center networks
Z Cao, M Kodialam… - IEEE/ACM Transactions on …, 2015 - ieeexplore.ieee.org
The advent and continued growth of large data centers has led to much interest in switch
architectures that can economically meet the high capacities needed for interconnecting the …
architectures that can economically meet the high capacities needed for interconnecting the …
PreNoc: Neural network based predictive routing for network-on-chip architectures
In this paper, we introduce a neural network based predictive routing algorithm for on-chip
networks which uses anticipated global network state and congestion information to …
networks which uses anticipated global network state and congestion information to …
Highly fault-tolerant NoC routing with application-aware congestion management
Silicon devices are becoming less and less reliable as technology moves to smaller feature
sizes. As a result, digital systems are increasingly likely to experience permanent failures …
sizes. As a result, digital systems are increasingly likely to experience permanent failures …