High leakage current in deep-submicrometer regimes is becoming a significant contributor
to power dissipation of CMOS circuits as threshold voltage, channel length, and gate oxide …

Is your memory hierarchy stopping your microprocessor from performing at the high level it
should be? Memory Systems: Cache, DRAM, Disk shows you how to resolve this problem …

“Tools alone aren't enough to reduce dynamic and leakage power in complex chip designs-
a well-planned methodology is needed. Following in the footsteps of the successful Reuse …

Leakage power is a major concern in current and future microprocessor designs. In this
paper, we explore the potential of architectural techniques to reduce leakage through power …

Power will be the key limiter to system scalability as interconnection networks take up an
increasingly significant portion of system power. In this paper, we propose an architectural …

Low power has emerged as a principal theme in today's world of electronics industries.
Power dissipation has become an important consideration as performance and area for …

Leakage current in the nanometer regime has become a significant portion of power
dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickness …

In this paper, the effect of gate tunneling current in ultra-thin gate oxide MOS devices of
effective length (L/sub eff/) of 25nm (oxide thickness= 1.1 nm), 50 nm (oxide thickness= 1.5 …

In this paper we address the growing issue of gate oxide leakage current (I/sub gate/) at the
circuit level. Specifically, we develop a fast approach to analyze the total leakage power of a …

The power consumption of integrated circuits is one of the most problematic considerations
affecting the design of high-performance chips and portable devices. The study of power …