7439, 563 B2 10/2008 Hatakeyama et al. yk S tkkS kkk 7.521, 773 B2 4/2 ()() 9 Y| mg z et a
1, SAAAAAAAS Wak et al. 7 so o 1 2 3oi i ai 2 ()() 8/() 2997||() A 1 12/20 () 8 Tombler et gl …

Carmen C. Cook (57) ABSTRACT A method for forming a semiconductor device includes
form ing a nanotube region using a thin epitaxial layer formed on the sidewall of a trench in …

US7960781B2 - Semiconductor device having vertical charge-compensated structure and
sub-surface connecting layer and method - Google Patents US7960781B2 - Semiconductor …

Metal-oxide semiconductor? eld effect transistors (MOS FETs) are a common type of power
switching device. A MOSFET device includes a source region, a drain region, a channel …

100 each of the trenches. The “Gap Filler layer can be very lightly doped Silicon or grown
and deposited dielectric layer. In an exemplary embodiment, the plurality of trenches are …

In one embodiment, a semiconductor device is formed having a trench structure. The trench
structure includes a single crys talline semiconductor plug formed along exposed upper Sur …

US6979862B2 - Trench MOSFET superjunction structure and method to manufacture -
Google Patents US6979862B2 - Trench MOSFET superjunction structure and method to …

ABSTRACT A trench MOSFET with drain (8), drift region (10) body (12) and source (14). In
order to improve the figure of merit for use (30) Foreign Application Priority Data of the …

Carmen C. Cook (57) ABSTRACT A method for forming a semiconductor device includes
form ing a nanotube region using a thin epitaxial layer formed on the sidewall of a trench in …

This invention relates to achieving high breakdown voltage and low on-resistance in
semiconductor devices that have top, intermediate and bottom regions with a controllable …