A balanced signal generator for lab on chip dielectrophoresis (DEP) levitation techniques

[PDF] academia.edu

Low-voltage subthreshold CMOS current mode circuits: Design and applications

MA Eldeeb, YH Ghallab, Y Ismail, H Elghitani - AEU-International Journal of …, 2017 - Elsevier
The world has migrated to portable applications ranging from smart phones to Lab on a Chip
applications. However they come with a new set of challenges for analog IC designers. Low …
被引用次数：45 相关文章 所有 2 个版本