Devices and techniques for accelerated packet processing are described herein. The device
can match an action to a portion of a network data packet and accelerate the packet …

Some embodiments of the invention provide a forwarding element that has a data-plane
circuit (data plane) that can be configured to implement one or more load balancers. The …

(57) ABSTRACT A method for generating configuration data for configuring a hardware
switch is described. The method receives a description of functionality for the hardware …

370/369 2007/0183415 A1 8/2007 Fischer et al. 2008/0247409 Al 10/2008 Choudhury et al.
2010/0088756 A1 4/2010 Balakrishnan et al. 2014/0241361 A1 8/2014 Bosshart et al …

A pool of unit memories is provided in order to flexibly allocate memory capacity to
implement various tables and/or logical memories such as those for implementing an …

Some embodiments provide a method for processing a packet for a pipeline of a hardware
switch. The pipeline, in some embodiments, includes several different stages that match …

Some embodiments provide a method for a deparser of a processing pipeline. The method
receives, from a set of match-action stages of the pipeline, packet header field (PHF) values …

Technologies for controlling operation of a compute node coupled to a computer network via
a computing device that includes communications for communicating with the computer …

Technologies for controlling operation of a compute node coupled to a computer network via
a computing device that includes communications for communicating with the computer …

Technologies for controlling operation of a compute node coupled to a computer network via
a computing device that includes communications for communicating with the computer …