This paper describes a 28-Gb/s receiver IC with self-contained adaptive equalization and
sampling point control using an on-chip stochastic sigma-tracking eye-opening monitor …

This study provides a comprehensive review of decision feedback equalisation (DFE) for
multi‐giga‐bit‐per‐second (Gbps) data links. The state‐of‐the‐art of DFE for multi‐Gbps …

This paper presents a new 2-D on-chip eye-opening monitor (EOM) for Gb/s serial links. A
comprehensive review of the state-of-the-art of on-chip EOMs is provided and their pros and …

A 10-Gb/s on-chip 1-D eye-opening monitor (EOM) for receiver front-end equalizer boost
gain adaptations is presented. The proposed EOM circuits report in real-time horizontal eye …

This paper presents a time-to-digital converter-based oversampling input-delayed multi-
standard adaptable data-receiver architecture which digitizes transitions/threshold-crossings …

The continuous-time linear equalizer (CTLE) is a key component in receivers for improving
the achievable bit error rate. Available CTLE background adaptation methods are limited to …

As the data rate requirements for many wireline applications increase, channel bandwidth
limitation becomes a critical problem in serial interfaces. Equalizers are often used as a …

This paper presents an adaptive edge decision feedback equalizer (DFE) with 4PAM
signaling. Optimal DFE tap coefficients and threshold voltages for data recovery are …

This paper introduces a 3-tap half-rate adaptive decision feedback equalizer (DFE) and a 2-
D eye-opening monitor (EOM). A newly developed regenerating sampler (RG-sampler) with …

This paper presents a configurable multi-mode eye-opening monitor (EOM) with non-
uniform sampling and quantization for on-chip high-speed link built-in-self-test (BIST). The …