OpenMP extensions for FPGA accelerators

D Cabrera, X Martorell, G Gaydadjiev… - 2009 International …, 2009 - ieeexplore.ieee.org
Reconfigurable computing is one of the paths to explore towards low-power
supercomputing. However, programming these reconfigurable devices is not an easy task …

A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures

F Ferrandi, S Curzel, L Fiorin, D Ielmini… - arXiv preprint arXiv …, 2023 - arxiv.org
In recent years, the field of Deep Learning has seen many disruptive and impactful
advancements. Given the increasing complexity of deep neural networks, the need for …

ShapeUp: A high-level design approach to simplify module interconnection on FPGAs

C Neely, G Brebner, W Shang - 2010 18th IEEE Annual …, 2010 - ieeexplore.ieee.org
The latest generation of FPGA devices offers huge resource counts that provide the
headroom to implement large-scale and complex systems. However, this poses increasing …

Modeling and efficient mining of intentional knowledge of outliers

Z Chen, J Tang, AWC Fu - Seventh International Database …, 2003 - ieeexplore.ieee.org
In this paper, we study in a general setting the notion of outliered patterns as intentional
knowledge of outliers and algorithms to mine those patterns. Our contributions consist of a …

Hardware task scheduling optimizations for reconfigurable computing

M Huang, H Simmler, P Saha… - … Workshop on High …, 2008 - ieeexplore.ieee.org
Reconfigurable computers (RC) can provide significant performance improvement for
domain applications. However, wide acceptance of todaypsilas RCs among domain scientist …

ReShape: Towards a high-level approach to design and operation of modular reconfigurable systems

CE Neely, G Brebner, W Shang - ACM Transactions on Reconfigurable …, 2013 - dl.acm.org
The latest FPGA devices provide the headroom to implement large-scale and complex
systems. A key requirement is the integration of modules from diverse sources to promote …

[PDF][PDF] Hardware parallelism vs. software parallelism

JA Chandy, J Singaraju - Proceedings of the First USENIX Conference …, 2009 - usenix.org
In this paper, we explore the rationale for multicore parallelism and instead argue that a
better use of transistors is to use reconfigurable hardware cores. The difficulty in achieving …

Strategic challenges for application development productivity in reconfigurable computing

SG Merchant, BM Holland, C Reardon… - 2008 IEEE National …, 2008 - ieeexplore.ieee.org
Performance and versatility requirements arising from escalating fabrication costs and
design complexities are making reconfigurable computing technologies increasingly …

Flexible and modular support for timing functions in high performance networking acceleration

C Neely, G Brebner, W Shang - 2010 International Conference …, 2010 - ieeexplore.ieee.org
Field programmable logic is increasingly used to provide the high performance and flexible
acceleration needed for network processing functions at multiple gigabit/second rates …

IP-XACT extensions for Reconfigurable Computing

R Nane, S van Haastregt, T Stefanov… - ASAP 2011-22nd …, 2011 - ieeexplore.ieee.org
Many of today's embedded multiprocessor systems are implemented as heterogeneous
systems, consisting of hardware and software components. To automate the composition …