New techniques and tools for application-dependent testing of FPGA-based components

A Cilardo - IEEE Transactions on Industrial Informatics, 2014 - ieeexplore.ieee.org
Field programmable gate array (FPGA) devices are increasingly being deployed in industrial
environments, making reconfigurable hardware testing and reliability an active area of …

A memristor-based LUT for FPGAs

HAF Almurib, TN Kumar… - The 9th IEEE International …, 2014 - ieeexplore.ieee.org
This paper presents a memristor-based Look-Up Table (LUT) for FPGAs. The proposed
memory utilizes memristors as storage elements and NMOS transistors for selection. New …

An FPGA-based dynamically reconfigurable platform for emulation of permanent faults in ASICs

A Ullah, E Sánchez, L Sterpone, LA Cardona… - Microelectronics …, 2017 - Elsevier
FPGA-based emulation of permanent faults in ASICs can considerably improve the fault
simulation time compared to traditional software-based approaches. Moreover, a hardware …

Fast online diagnosis and recovery of reconfigurable logic fabrics using design disjunction

A Alzahrani, RF DeMara - IEEE Transactions on Computers, 2016 - ieeexplore.ieee.org
Design disjunction is developed to offer a broad coverage, high resolution, and low
overhead approach to online diagnosis and recovery of reconfigurable fabrics. Design …

Design and analysis of low-transition address generator

S Saravanan, M Hailu, GM Gouse, M Lavanya… - Advances of Science …, 2019 - Springer
In high-speed Nano-scale VLSI designs, memory plays a vital role of operation. Built-In Self-
Test (BIST) for memory is an essential element of the system-on-chip (SoC). Investigating …

Low power memory built in self test address generator using clock controlled linear feedback shift registers

KM Krishna, M Sailaja - Journal of Electronic Testing, 2014 - Springer
In the ongoing high-speed, high-tech sophistication in the technology of VLSI designs, Built-
in Self-Test (BIST) is emerging as the essential element of the memory, which can be treated …

Application-dependent testing of FPGA interconnect network

S Banik, S Roy, B Sen - IEEE transactions on very large scale …, 2019 - ieeexplore.ieee.org
The extensive application of field-programmable gate array (FPGA) devices in industrial
environments makes FPGA testing a significant area of exploration. The application …

A single-configuration method for application-dependent testing of SRAM-based FPGA interconnects

HAF Almurib, TN Kumar… - 2011 Asian Test …, 2011 - ieeexplore.ieee.org
This paper presents a new method for application-dependent testing of SRAM-based FPGA
interconnects at run time. This method utilizes new features related to the function for the …

Scalable application-dependent diagnosisof interconnects of SRAM-based FPGAs

HAF Almurib, TN Kumar… - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
This paper presents a new method for diagnosing (detection and location) multiple faults in
an application-dependent interconnect of a SRAM-based FPGA. For fault detection, the …

A fault-aware toolchain approach for FPGA fault tolerance

A Gupte, S Vyas, PH Jones - ACM Transactions on Design Automation …, 2015 - dl.acm.org
As the size and density of silicon chips continue to increase, maintaining acceptable
manufacturing yields has become increasingly difficult. Recent works suggest that …