Low-power FSMs in FPGA: Encoding alternatives
In this paper, the problem of state encoding of FPGA-based synchronous finite state
machines (FSMs) for low-power is addressed. Four codification schemes have been studied …
machines (FSMs) for low-power is addressed. Four codification schemes have been studied …
Power aware dividers in FPGA
This paper surveys different implementations of dividers on FPGA technology. A special
attention is paid on ATP (area-time-power) trade-offs between restoring, non-restoring, and …
attention is paid on ATP (area-time-power) trade-offs between restoring, non-restoring, and …
Power estimations vs. power measurements in Spartan-6 devices
Experimental measurements of power consumption for core logic of a 45-nm Spartan-6
FPGA and the comparison with the values predicted by the power estimation tool are …
FPGA and the comparison with the values predicted by the power estimation tool are …
Power estimations vs. power measurements in Cyclone III devices
This paper presents experimental measurements of power consumption for core logic of a
65-nm Cyclone III FPGA and its comparison with the value predicted by the power estimation …
65-nm Cyclone III FPGA and its comparison with the value predicted by the power estimation …
[HTML][HTML] Experiments in low power FPGA design
This paper summarizes the utility of some low-power design (LPD) methods based on
architectural and implementation modifications, for FPGA based systems. Power …
architectural and implementation modifications, for FPGA based systems. Power …
[HTML][HTML] Power consumption optimization in Reed Solomon encoders over FPGA
C Sandoval - Latin American applied research, 2014 - SciELO Argentina
This paper presents an analysis of the Reed Solomon encoder model and GF (2 m)
multiplier component, with the aim of optimizing the power consumption for reconfigurable …
multiplier component, with the aim of optimizing the power consumption for reconfigurable …
FSM decomposition for low power in FPGA
In this paper, the realization of low power finite state machines (FSMs) on FPGAs using
decomposition techniques is addressed. The original FSM is divided into two submachines …
decomposition techniques is addressed. The original FSM is divided into two submachines …
A low cost system for self measurements of power consumption in field programmable gate arrays
This paper presents a specific system to measure power consumption in FPGAs. It is based
on a current-frequency conversion block. This tool allows an application running inside the …
on a current-frequency conversion block. This tool allows an application running inside the …
Técnicas de bajo consumo en FPGAs
JP Oliver - 2014 - lareferencia.info
Todo diseño electrónico tiene tres restricciones principales que son área, velocidad y
consumo. De las tres, el consumo es la variable más complicada de manejar para un …
consumo. De las tres, el consumo es la variable más complicada de manejar para un …
[PDF][PDF] Propiedad Conmutativa y Diseño de Bajo Consumo: Algunos Ejemplos en FPGAs
En este trabajo se muestra que, en términos de consumo de potencia, los circuitos digitales
aritméticos, no siempre cumplen la Propiedad Conmutativa. En consecuencia, es posible …
aritméticos, no siempre cumplen la Propiedad Conmutativa. En consecuencia, es posible …