Investigation of a Ge-source vertical TFET with delta-doped layer
K Vanlalawpuia, B Bhowmick - IEEE Transactions on Electron …, 2019 - ieeexplore.ieee.org
In this article, a δ-doped germanium-source vertical TFET (Ge-source vTFET) is proposed
and investigated by Synopsis TCAD simulation. Higher ON-state current is obtained as the …
and investigated by Synopsis TCAD simulation. Higher ON-state current is obtained as the …
Achievement of extremely small subthreshold swing in Vertical Source-All-Around-TFET with suppressed ambipolar conduction
P Ramesh, B Choudhuri - Microelectronics Journal, 2023 - Elsevier
In this manuscript, we come up with a new line-tunneling-based channel-engineered
GaAsSb/GaSb heterojunction Source-All-Around Vertical Nanowire TFET (SAA-NW-VTFET) …
GaAsSb/GaSb heterojunction Source-All-Around Vertical Nanowire TFET (SAA-NW-VTFET) …
Experimental demonstration of strained Si nanowire GAA n-TFETs and inverter operation with complementary TFET logic at low supply voltages
GV Luong, S Strangio, A Tiedemannn, S Lenk… - Solid-State …, 2016 - Elsevier
In this work, strained Si (sSi) nanowire array of n-TFETs with gates all around (GAA) yielding
ON-currents of 5 μA/μm at a supply voltage V dd= 0.5 V are presented. Tilted ion …
ON-currents of 5 μA/μm at a supply voltage V dd= 0.5 V are presented. Tilted ion …
Doping profile engineered triple heterojunction TFETs with 12-nm body thickness
Triple heterojunction (THJ) tunneling field-effect transistors (TFETs) have been proposed to
resolve the low ON-current challenge of TFETs. However, the design space for THJ-TFETs is …
resolve the low ON-current challenge of TFETs. However, the design space for THJ-TFETs is …
Analog design with Line-TFET device experimental data: from device to circuit level
W Gonçalez Filho, E Simoen… - Semiconductor …, 2020 - iopscience.iop.org
This work studies the use of line-tunnel field effect transistor (Line TFET) devices in analog
applications. It presents the DC and small signal characteristics of these devices and …
applications. It presents the DC and small signal characteristics of these devices and …
A new analytical modelling of 10 nm negative capacitance-double gate TFET with improved cross talk and miller effects in digital circuit applications
In this paper, the workability of a Negative Capacitance (NC)-Double Gate (DG) Tunnel FET
(NC-DGTFET) for digital logic circuit implementation has been detailed. New analytical …
(NC-DGTFET) for digital logic circuit implementation has been detailed. New analytical …
Improvement of C-shaped pocket TFET with sandwiched drain for ambipolar performance and analog/RF performance
W Xiao, L Wang, Y Peng, Y Ding, Y Ma, F Yang… - Microelectronics …, 2024 - Elsevier
A novel structure of tunneling field effect transistor device (CSP-SD-TFET) is proposed,
which adds a sandwiched drain to the C-shaped pocket TFET (CSP-TFET). This structure …
which adds a sandwiched drain to the C-shaped pocket TFET (CSP-TFET). This structure …
Performance of TFET and FinFET devices applied to current mirrors for different dimensions and temperatures
MDV Martino, JA Martino, PGD Agopian… - Semiconductor …, 2016 - iopscience.iop.org
The goal of this work is to compare the behavior of a current mirror designed with Tunnel-
FET and FinFET devices. The suitability of these technologies in such a basic circuit has …
FET and FinFET devices. The suitability of these technologies in such a basic circuit has …
Performance comparison between TFET and FinFET differential pair
MDV Martino, JA Martino… - 2015 30th Symposium on …, 2015 - ieeexplore.ieee.org
The goal of this work is to analyze the suitability of TFET and FinFET transistors in a
differential pair. A quantitative comparison has been made based on the differential gain, the …
differential pair. A quantitative comparison has been made based on the differential gain, the …
Performance of differential pair circuits designed with line tunnel FET devices at different temperatures
MDV Martino, JA Martino, PGD Agopian… - Semiconductor …, 2018 - iopscience.iop.org
This work studies differential pair circuits designed with Line tunnel field effect transistors
(TFETs), comparing their suitability with conventional Point TFETs. Differential voltage gain …
(TFETs), comparing their suitability with conventional Point TFETs. Differential voltage gain …