Aggressive scaling in deep nanometer technology enables chip multiprocessor design
facilitated by the communication-centric architecture provided by Network-on-Chip (NoC). At …

To achieve high reliability in on-chip networks, it is necessary to test the network as
frequently as possible to detect physical failures before they lead to system-level failures. A …

By introducing wireless interfaces in conventional wired routers or hubs, wireless network‐
on‐chip (WiNoC) is proposed to relieve congestion pressure from high volume inter‐subnet …

This paper presents a reconfigurable fault tolerant routing for Networks-on-Chip organized
into hierarchical units. In case of link faults or failure of switches, the proposed approach …

High reliability against undesirable effects is one of the key objectives in the design for
Network-on-Chip (NoC). As a result, designing reliable and efficient routing method is highly …

To tolerate faults in Networks-on-Chip (NoC), routers are often disconnected from the NoC,
which affects the system integrity. This is because cores connected to the disabled routers …

Communication prerequisites in multi-core systems are highly convoked by egressing the
network-on-chip (NC) architecture. NC should cover communication reliability issues that …