Cooperative checkpointing: A robust approach to large-scale systems reliability

AJ Oliner, L Rudolph, RK Sahoo - Proceedings of the 20th annual …, 2006 - dl.acm.org
Cooperative checkpointing increases the performance and robustness of a system by
allowing checkpoints requested by applications to be dynamically skipped at runtime. A …

Hardware wake-and-go mechanism with look-ahead polling

RK Arimilli, SP Sharma, RC Swanberg - US Patent 8,341,635, 2012 - Google Patents
A hardware wake-and-go mechanism is provided for a data processing system. The wake-
and-go mechanism looks ahead in a thread for programming idioms that indicates that the …

On the performance potential of different types of speculative thread-level parallelism: The DL version of this paper includes corrections that were not made available …

A Kejariwal, X Tian, W Li, M Girkar… - Proceedings of the 20th …, 2006 - dl.acm.org
Recent research in thread-level speculation (TLS) has proposed several mechanisms for
optimistic execution of difficult-to-analyze serial codes in parallel. Though it has been shown …

A preliminary study on the vectorization of multimedia applications for multimedia extensions

G Ren, P Wu, D Padua - Languages and Compilers for Parallel Computing …, 2004 - Springer
In 1994, the first multimedia extension, MAX-1, was introduced to general-purpose
processors by HP. Almost ten years have passed, the present means of accessing the …

An empirical study on the vectorization of multimedia applications for multimedia extensions

G Ren, P Wu, D Padua - 19th IEEE International Parallel and …, 2005 - ieeexplore.ieee.org
Multimedia extensions (MME) are architectural extensions to general-purpose processors to
boost the performance of multimedia workloads. Today, in-line assembly code, intrinsic …

Wake-and-go mechanism with data monitoring

RK Arimilli, SP Sharma, RC Swanberg - US Patent 8,386,822, 2013 - Google Patents
US PATENT DOCUMENTS 4,733,352 A 3, 1988 Nakamura et al. 4,918,653 A 4, 1990 Johri
et al. 5,083,266 A 1/1992 Watanabe 5,161,227 A 11/1992 Dias et al. 5,202,988 A 4/1993 …

Comparative architectural characterization of SPEC CPU2000 and CPU2006 benchmarks on the intel® Core™ 2 Duo processor

A Kejariwal, AV Veidenbaum, A Nicolau… - 2008 International …, 2008 - ieeexplore.ieee.org
SPEC CPU benchmarks are commonly used by compiler writers and architects of general
purpose processors for performance evaluation. Since the release of the CPU89 suite, the …

Migrating sleeping and waking threads between wake-and-go mechanisms in a multiple processor data processing system

RK Arimilli, SP Sharma, RC Swanberg - US Patent 8,230,201, 2012 - Google Patents
WAKE-AND-GO lating a wake-and-go storage array with the target address. The operating
system places the thread in a sleep state. Responsive to detecting the event that modifies …

Wake-and-go mechanism with data exclusivity

RK Arimilli, SP Sharma, RC Swanberg - US Patent 8,225,120, 2012 - Google Patents
Snoop response logic on a system bus is configured to detect on the system bus requests to
access data at a target address with data exclusivity from at least one of a plurality of wake …

Programming idiom accelerator for remote update

RK Arimilli, SP Sharma, RC Swanberg - US Patent 8,082,315, 2011 - Google Patents
A remote update programming idiom accelerator identifies a remote update programming
idiom in an instruction sequence of a thread running on a processing unit of a data …