Vertically-grown TFETs: an extensive analysis

AS Geege, TSA Samuel - Silicon, 2023 - Springer
TFET is an exciting device for ultra-low and low power implementations since it improves
electrical performance while also providing steeper switching ratio. This study encloses with …

[PDF][PDF] Design and analysis of hetero dielectric dual material gate underlap spacer tunnel field effect transistor

S Howldar, B Balaji, K Srinivasa Rao - International Journal of Engineering …, 2023 - ije.ir
This paper presents a design and analysis of a Hetero Dielectric Dual Material Gate
Underlap Spacer Tunnel Field Effect Transistor, aiming to enhance device performance and …

Stacked ferroelectric heterojunction tunnel field effect transistor on a buried oxide substrate for enhanced electrical performance

G Gopal, H Garg, H Agrawal… - … Science and Technology, 2022 - iopscience.iop.org
The device behavior of a stacked ferroelectric heterojunction tunnel field effect transistor (Fe-
HTFET) on a buried oxide substrate is investigated in this paper. Si-doped HfO 2 was taken …

Design and simulation of triple metal double-gate germanium on insulator vertical tunnel field effect transistor

T Chawla, M Khosla, B Raj - Microelectronics journal, 2021 - Elsevier
In this paper, a novel Triple metal double gate germanium on insulator vertical TFET is
proposed and investigated by using SILVACO ATLAS TCAD tool. Gate metal work-function …

Impact of temperature on the reliability of UTB-DG-FE-TFETs and their RF/analog and linearity parameter dependence

G Gopal, T Varma - Journal of Electronic Materials, 2023 - Springer
This study aimed to investigate the influence of temperature on the reliability of an ultrathin-
body double-gate ferroelectric tunnel field-effect transistor (UTB-DG-FE-TFET). An in-depth …

Implementation of band gap and gate oxide engineering to improve the electrical performance of SiGe/InAs charged plasma-based junctionless-TFET

K Kumar, A Kumar, V Mishra, SC Sharma - Silicon, 2023 - Springer
This paper reports on a charged plasma-based adjustable bandgap source/channel (So/Ch)
interface using a new semiconductor compound (SiGe/InAs) and bimaterial oxide …

Extended Gate to source overlap Heterojunction Vertical TFET: Design, analysis, and optimization with process parameter variations

T Chawla, M Khosla, B Raj - Materials Science in Semiconductor …, 2022 - Elsevier
This report highlights the simulated results of Extended gate to source overlap
Heterojunction Vertical Tunnel field effect transistor (EGH-VTFET) for low-power and high …

Energy band adjustment in a reliable novel charge plasma SiGe source TFET to intensify the BTBT rate

MK Anvarifard, AA Orouji - IEEE Transactions on Electron …, 2021 - ieeexplore.ieee.org
The energy band of a novel Si 0.7 Ge 0.3 source tunneling field-effect transistor (TFET) is
successfully adjusted and sharply bent without any physical formation of metallurgical …

Design of tunnel FET architectures for low power application using improved Chimp optimizer algorithm

S Bhattacharya, SL Tripathi, VK Kamboj - Engineering with Computers, 2023 - Springer
An improved Chimps optimizer algorithm is proposed in this paper and is applied for the
performance optimization of tunnel FET architectures for use in low power VLSI circuits. The …

Electrical performance improvement of charge plasma-based junctionless TFET using novel coalescence of SiGe/GaAs and heterogeneous gate dielectric

K Kumar, A Kumar, SC Sharma - Applied Physics A, 2023 - Springer
In this research article, a junctionless tunnel field-effect transistor (JLTFET) based on the
charge plasma concept has been proposed and analyzed using novel coalescence of …