A compact and scalable hardware/software co-design of SIKE
We present efficient and compact hardware/software co-design implementations of the
Supersingular Isogeny Key Encapsulation (SIKE) protocol on field-programmable gate …
Supersingular Isogeny Key Encapsulation (SIKE) protocol on field-programmable gate …
Impress: Large integer multiplication expression rewriting for fpga hls
Large integer multiplication is becoming a major challenge for FPGA-based acceleration of
many cryptographic applications. Existing techniques for decomposing and optimizing large …
many cryptographic applications. Existing techniques for decomposing and optimizing large …
A high-performance ecc processor over curve448 based on a novel variant of the karatsuba formula for asymmetric digit multiplier
AM Awaludin, J Park, RW Wardhani, H Kim - IEEE Access, 2022 - ieeexplore.ieee.org
In this paper, we present a high-performance architecture for elliptic curve cryptography
(ECC) over Curve448, which to the best of our knowledge, is the fastest implementation of …
(ECC) over Curve448, which to the best of our knowledge, is the fastest implementation of …
Exploring the Advantages and Challenges of Fermat NTT in FHE Acceleration
Recognizing the importance of a fast and resource-efficient polynomial multiplication in
homomorphic encryption, in this paper, we design a multiplier-less number theoretic …
homomorphic encryption, in this paper, we design a multiplier-less number theoretic …
ECC on Your Fingertips: A Single Instruction Approach for Lightweight ECC Design in GF(p)
Abstract Lightweight implementation of Elliptic Curve Cryptography on FPGA has been a
popular research topic due to the boom of ubiquitous computing. In this paper we propose a …
popular research topic due to the boom of ubiquitous computing. In this paper we propose a …
Four on FPGA: New Hardware Speed Records for Elliptic Curve Cryptography over Large Prime Characteristic Fields
We present fast and compact implementations of Four Q (ASIACRYPT 2015) on field-
programmable gate arrays (FPGAs), and demonstrate, for the first time, the high efficiency of …
programmable gate arrays (FPGAs), and demonstrate, for the first time, the high efficiency of …
Exploring RFC 7748 for Hardware Implementation: Curve25519 and Curve448 with Side-Channel Protection
P Sasdrich, T Güneysu - Journal of Hardware and Systems Security, 2018 - Springer
Recent revelations on manipulations and back-doors in modern ECC have initiated the
revision of existing schemes and led to the selection of two new solutions for next …
revision of existing schemes and led to the selection of two new solutions for next …
High-Throughput Bilinear Pairing Processor for Server-Side FPGA Applications
J Sakamoto, D Fujimoto, R Anzai… - … Transactions on Very …, 2024 - ieeexplore.ieee.org
This study focuses on the acceleration of cryptographic pairing operations on field-
programmable gate arrays (FPGAs) for server-side applications. Previous studies on FPGA …
programmable gate arrays (FPGAs) for server-side applications. Previous studies on FPGA …
Cryptographically secure multi-tenant provisioning of FPGAs
Field-programmable gate arrays (FPGAs) have gained massive popularity today as
accelerators for a variety of workloads, including big data analytics, and parallel and …
accelerators for a variety of workloads, including big data analytics, and parallel and …
Reconfigurable LUT: A double edged sword for security-critical applications
Modern FPGAs offer various new features for enhanced reconfigurability and better
performance. One of such feature is a dynamically Reconfigurable LUT (RLUT) whose …
performance. One of such feature is a dynamically Reconfigurable LUT (RLUT) whose …