An interposer-based three-dimensional integrated circuit, which introduces a silicon
interposer as an interface between chips and a package, is one of the most promising …

Interposer-based 3D ICs (or known as 2.5 D ICs) have been seen as an alternative
approach to true 3D stacked ICs, which mount multiple dies on a silicon interposer and route …

To achieve the power, performance, and area (PPA) target in modern semiconductor design,
the trend to go for More-than-Moore heterogeneous integration by packing various …

Field Programmable Gate Array (FPGA) circuits have become an integral part of recent
embedded process control designs. However, printed circuit board (PCB) layout design has …

在現今積體電路的晶片與封裝設計流程中, 要同時在晶片, 封裝, 以及電路板三個領域達到界面凸
塊規劃與界面凸塊繞線的最佳化是一件非常困難的事情. 通常, 整個設計流程需要大量的人力 …

A complete methodology for distributed co-design and co-analysis of Die Re-distribution
layer with the package is developed and presented. A test chip is designed in a generic …

В данной работе представлена комплексная методология оптимизации при
проектировании элементов конструкции процессора и вычислительного модуля …

In current chip and package designs, it is a bottleneck to simultaneously optimize both pin
assignment and pin routing for different design domains (chip, package, and board). Usually …