A system includes a plurality of host processors and a plurality of HMC devices configured
as a distributed shared memory for the host processors. An HMC device includes a plurality …

A system includes a plurality of host processors and a plurality of hybrid memory cube
(HMC) devices configured as a distributed shared memory for the host processors. An HMC …

A fabric control protocol is described for use within a data center in which a switch fabric
provides full mesh interconnectivity such that any of the servers may communicate packet …

(57) ABSTRACT A new processing architecture is described in which a data processing unit
(DPU) is utilized within a device. Unlike conventional compute models that are centered …

Methods and apparatus for memory management are described. In a disclosed
embodiment, a system has a first and a second processor, with each processor able to …

Techniques are described in which a device, such as a network device, compute node or
storage device, is configured to utilize a work unit (WU) stack data structure in a multiple …

Techniques are described in which a system having multiple processing units processes a
series of work units in a processing pipeline, where some or all of the work units access or …

This disclosure describes techniques that include establish ing a service chain of operations
that are performed on a network packet as a sequence of operations. In one example, this …

Methods and apparatus for memory management are described. In one example, this
disclosure describes a method that includes executing, by a first processing unit, first work …

Techniques are described in which a system having multiple processing units processes a
series of work units in a processing pipeline, where some or all of the work units access or …