A modeling approach for mixed-mode FMCW synthesizer allowing frequency error analysis

A 24 GHz FMCW/Doppler dual-mode frequency synthesizer with 68.8 kHz RMS FM error and 1.25 GHz chirp bandwidth

J Li, C Shi, Z Chen, H Deng, J Chen… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
This brief presents a 24 GHz dual-mode frequency synthesizer designed in a 55-nm CMOS
technology supporting both Doppler and frequency modulated continuous wave (FMCW) …
被引用次数：6 相关文章 所有 2 个版本

A 2.3 GHz 2.8 mW sampling ΔΣ PLL achieving− 110 dBc/Hz in-band phase noise and 500 MHz FMCW chirp

H Su, J Tao, SD Balon, CH Heng - IEEE Journal of Solid-State …, 2021 - ieeexplore.ieee.org
A phase interpolator (PI)-free fractional-sampling phase-locked loop (SPLL) has been
proposed and implemented in 130 nm CMOS technology, which eliminates time-domain PI …
被引用次数：2 相关文章 所有 2 个版本