Online task remapping strategies for fault-tolerant network-on-chip multiprocessors
O Derin, D Kabakci, L Fiorin - Proceedings of the Fifth ACM/IEEE …, 2011 - dl.acm.org
As CMOS technology scales down into the deep-submicron domain, the aspects of fault
tolerance in complex Networks-on-Chip (NoCs) architectures are assuming an increasing …
tolerance in complex Networks-on-Chip (NoCs) architectures are assuming an increasing …
A3MAP: Architecture-aware analytic mapping for networks-on-chip
In this article, we propose novel and global Architecture-Aware Analytic MAPping (A3MAP)
algorithms applied to Networks-on-Chip (NoCs) not only with homogeneous Processing …
algorithms applied to Networks-on-Chip (NoCs) not only with homogeneous Processing …
Hardware/software partitioning of embedded system-on-chip applications
HW/SW partitioning is an important development step during HW/SW co-design to ensure
application performance in embedded System-on-Chip (SoC). This paper formulates the …
application performance in embedded System-on-Chip (SoC). This paper formulates the …
Partitioning and dynamic mapping evaluation for energy consumption minimization on NoC-based MPSoC
E Antunes, M Soares, A Aguiar… - … on Quality Electronic …, 2012 - ieeexplore.ieee.org
Software complexity has increased considerably over recent years, needing special target
architectures as NoC-based MPSoCs to fulfill the heavy storage, communication and …
architectures as NoC-based MPSoCs to fulfill the heavy storage, communication and …
Partitioning and mapping on NoC-based MPSoC: an energy consumption saving approach
Software complexity has increased considerably over recent years, needing special target
architectures as MPSoCs to fulfill the heavy memory, communication and computation …
architectures as MPSoCs to fulfill the heavy memory, communication and computation …
Smt-based multi-objective optimization for scheduling of mpsoc applications
Network-on-Chip (NoC) is a promising interconnecting paradigm in the state-of-the-art multi-
core architectures. Its communication network can increase the capacity of parallel data …
core architectures. Its communication network can increase the capacity of parallel data …
A collision management structure for NoC deployment on multi-FPGA
A Dorai, V Fresse, C Combes, EB Bourennane… - Microprocessors and …, 2017 - Elsevier
With the increasing complexity of algorithms and new applications, the design of efficient
embedded systems has to integrate efficient communication structures such as Network-on …
embedded systems has to integrate efficient communication structures such as Network-on …
[PDF][PDF] Architecture optimisation of embedded systems under uncertainty in probabilistic reliability evaluation model parameters
I Meedeniya - Ph. D. Thesis, 2012 - Citeseer
Software plays a vital role in most of the embedded systems including safety and mission-
critical systems in avionics, automotive, nuclear and medical applications. Along with the …
critical systems in avionics, automotive, nuclear and medical applications. Along with the …
Formal approach to agent-based dynamic reconfiguration in Networks-On-Chip
S Ostroumov, L Tsiopoulos, J Plosila, K Sere - Journal of Systems …, 2013 - Elsevier
Abstract A Network-On-Chip (NoC) platform is an emerging topology for large-scale
applications. It provides a required number of resources for critical and excessive …
applications. It provides a required number of resources for critical and excessive …
An evolutionary approach for the task mapping problem
FN Mór - 2016 - meriva.pucrs.br
This works has the goal to implement an Evolutionary Algorithm, based on the classical
Differential Evolution, to solve the Task Mapping onto NoC problem. Our variant …
Differential Evolution, to solve the Task Mapping onto NoC problem. Our variant …