To meet the needs of a diverse range of workloads, asymmetric multicore processors
(AMPs) have been proposed, which feature cores of different microarchitecture or ISAs …

Chip-level power and thermal implications will continue to rule as one of the primary design
constraints and performance limiters. The gap between average and peak power actually …

Heterogeneous architectures that integrate a mix of big and small cores are very attractive
because they can achieve high single-threaded performance while enabling high …

Heterogeneous (or asymmetric) chip multiprocessors present unique opportunities for
improving system throughput, reducing processor power, and mitigating Amdahl's law. On …

Datacenter power consumption has a significant impact on both its recurring electricity bill
(Op-ex) and one-time construction costs (Cap-ex). Existing work optimizing these costs has …

Computer architecture has experienced a major paradigm shift from focusing only on raw
performance to considering power-performance efficiency as the defining factor of the …

In this paper we propose the Merge framework, a general purpose programming model for
heterogeneous multi-core systems. The Merge framework replaces current ad hoc …

Previous proposals for power-aware thread-level parallelism on chip multiprocessors
(CMPs) mostly focus on multiprogrammed workloads. Nonetheless, parallel computation of …

Heterogeneous multicore systems--comprised of multiple cores with varying capabilities,
performance, and energy characteristics--have emerged as a promising approach to …

Recent research advocates asymmetric multi-core architectures, where cores in the same
processor can have different performance. These architectures support single-threaded …