Advanced electron microscopy for III/V on silicon integration
The combination of III/V semiconductors with Si is very attractive, since it allows the
fabrication of high efficient optoelectronic devices like solar cells, lasers or the integration of …
fabrication of high efficient optoelectronic devices like solar cells, lasers or the integration of …
Performance improvement of 1T DRAM by raised source and drain engineering
MHR Ansari, S Cho - IEEE Transactions on Electron Devices, 2021 - ieeexplore.ieee.org
In this work, a double-gate (DG) metal-oxide-semiconductor field-effect transistor (MOSFET)
with raised source and drain (RSD) regions is utilized for application of one-transistor (1T) …
with raised source and drain (RSD) regions is utilized for application of one-transistor (1T) …
A polycrystalline-silicon dual-gate MOSFET-based 1T-DRAM using grain boundary-induced variable resistance
A polycrystalline-silicon (poly-Si) dual-gate MOSFET-based one-transistor dynamic random-
access memory (1T-DRAM) cell was developed using grain boundary (GB)-induced barrier …
access memory (1T-DRAM) cell was developed using grain boundary (GB)-induced barrier …
Pyramidal structure formation at the interface between III/V semiconductors and silicon
An enhancement of computer performance following Moore's law requires the
miniaturization of semiconductor devices. Presently, their dimensions reach the nanoscale …
miniaturization of semiconductor devices. Presently, their dimensions reach the nanoscale …
Vertical transistor with n-bridge and body on gate for low-power 1T-DRAM application
JT Lin, HH Lin, YJ Chen, CY Yu, A Kranti… - … on Electron Devices, 2017 - ieeexplore.ieee.org
In this paper, we propose a vertical transistor with n-bridge and body on gate (BOG-DRAM)
for Low-power 1T-DRAM application. The vertical channel of the device can reduce the short …
for Low-power 1T-DRAM application. The vertical channel of the device can reduce the short …
[图书][B] Fine-grain in-memory deduplication for large-scale workloads
JP Stevenson - 2013 - search.proquest.com
Memory is a large component of computer system cost and current trends indicate this cost
is increasing as a fraction of the total. Emerging applications such as in-memory databases …
is increasing as a fraction of the total. Emerging applications such as in-memory databases …
Asymmetric dual-gate-structured one-transistor dynamic random access memory cells for retention characteristics improvement
One of the major concerns of one-transistor dynamic random access memory (1T-DRAM) is
poor retention time. In this letter, a 1T-DRAM cell with two separated asymmetric gates was …
poor retention time. In this letter, a 1T-DRAM cell with two separated asymmetric gates was …
Growth of III/Vs on silicon: nitrides, phosphides, arsenides and antimonides
The growth of III/V semiconductors on Silicon substrates has attracted great attention since
quite some time as several promising device concepts rely on the defect-free integration of …
quite some time as several promising device concepts rely on the defect-free integration of …
Transistor-based apparatuses, systems and methods
C. Kuo; T.-J. King and C. Hu," A capacitorless double-gate DRAM cell design for high
density applications,” in Electron Devices Meet ing, 2002. IEDM'02. Digest. International, pp …
density applications,” in Electron Devices Meet ing, 2002. IEDM'02. Digest. International, pp …
An overview of FinFET-based capacitorless 1T-DRAM
M Rathi, GP Mishra - Device Circuit Co-Design Issues in FETs, 2023 - taylorfrancis.com
The demand for memory is increasing day by day, and the downscaling of conventional 1T-
1C DRAM in sub-10 nm technology is becoming a topic of concern. The fabrication and …
1C DRAM in sub-10 nm technology is becoming a topic of concern. The fabrication and …