Microarchitecturally Exploring Fault-Tolerance and Timing on Silicon on Chip
V Singh, G Khan, A Ojha - 2024 International Conference on …, 2024 - ieeexplore.ieee.org
This paper presents a micro architectural exploration of fault-tolerance and timing behavior
on silicon on chip. Silicon on chip represents a full-size mission in designing reliable …
on silicon on chip. Silicon on chip represents a full-size mission in designing reliable …
Exploring the Behavior of Soft-Error Rate Reduction Algorithms in Digital Circuits
C Menaka, N Saraswat… - … Computing and Wireless …, 2024 - ieeexplore.ieee.org
Smooth mistakes in virtual circuits, which talk over with inadvertent modifications to saved
bits or transmitted records because of temporary faults caused by external radiation …
bits or transmitted records because of temporary faults caused by external radiation …