With the rapid development of scientific computation, more and more researchers and
developers are committed to implementing various workloads/operations on different …

= T0 [a0, j]+ T1 [a1, j+ 1 mod 4]+ T2 [a2, j+ 2 mod 4]+ T3 [a3, j+ 3 mod 4] for each column
0≤ j< 4, where ai, j and bi, j are the bytes in the old and almost-new state respectively (still …

To meet performance and energy efficiency demand of modern workloads, specialized
hardware accelerators implemented on FPGAs or ASICs have found adoption in modern …