Adapt-noc: A flexible network-on-chip design for heterogeneous manycore architectures
The increased computational capability in heterogeneous manycore architectures facilitates
the concurrent execution of many applications. This requires, among other things, a flexible …
the concurrent execution of many applications. This requires, among other things, a flexible …
[图书][B] Network-on-chip: the next generation of system-on-chip integration
S Kundu, S Chattopadhyay - 2014 - library.oapen.org
Addresses the Challenges Associated with System-on-Chip Integration Network-on-Chip:
The Next Generation of System-on-Chip Integration examines the current issues restricting …
The Next Generation of System-on-Chip Integration examines the current issues restricting …
SMART: A single-cycle reconfigurable NoC for SoC applications
As technology scales, SoCs are increasing in core counts, leading to the need for scalable
NoCs to interconnect the multiple cores on the chip. Given aggressive SoC design targets …
NoCs to interconnect the multiple cores on the chip. Given aggressive SoC design targets …
A versatile and flexible chiplet-based system design for heterogeneous manycore architectures
Heterogeneous manycore architectures are deployed to simultaneously run multiple and
diverse applications. This requires various computing capabilities (CPUs, GPUs, and …
diverse applications. This requires various computing capabilities (CPUs, GPUs, and …
Reconfigurable network-on-chip for 3D neural network accelerators
A Firuzan, M Modarressi… - 2018 Twelfth IEEE …, 2018 - ieeexplore.ieee.org
Parallel hardware accelerators for large-scale neural networks typically consist of several
processing nodes, arranged as a multi-or many-core system-on-chip, connected by a …
processing nodes, arranged as a multi-or many-core system-on-chip, connected by a …
On self-tuning networks-on-chip for dynamic network-flow dominance adaptation
Modern network-on-chip (NoC) systems are required to handle complex runtime traffic
patterns and unprecedented applications. Data traffics of these applications are difficult to …
patterns and unprecedented applications. Data traffics of these applications are difficult to …
[HTML][HTML] A performance-centric ML-based multi-application mapping technique for regular network-on-chip
This research article discusses the challenges faced by the Network-on-Chip (NoC)
architecture due to increased integration density and proposes a novel fault-tolerant multi …
architecture due to increased integration density and proposes a novel fault-tolerant multi …
Reconfigurable network-on-chip based convolutional neural network accelerator
Abstract Convolutional Neural Networks (CNNs) have a wide range of applications due to
their superior performance in image and pattern classification. However, the performance of …
their superior performance in image and pattern classification. However, the performance of …
A compute-in-memory hardware accelerator design with back-end-of-line (BEOL) transistor based reconfigurable interconnect
Compute-in-memory (CIM) paradigm using ferroelectric field effect transistor (FeFET) as the
weight element is projected to exhibit excellent energy efficiency for accelerating deep …
weight element is projected to exhibit excellent energy efficiency for accelerating deep …
Dynamically scalable noc architecture for implementing run-time reconfigurable applications
The paper proposes two architectures for a dynamically scalable network-on-chip (NoC) for
dynamically reconfigurable intellectual properties (IPs) to save power. The first architecture …
dynamically reconfigurable intellectual properties (IPs) to save power. The first architecture …