This paper presents the design and implementation of an analog signal processor (ASP)
ASIC for portable ECG monitoring systems. The ASP ASIC performs four major …

An adaptive resolution (AR) asynchronous analog-to-digital converter (ADC) architecture is
presented. Data compression is achieved by the inherent signal dependent sampling rate of …

Distributed sensor networks, human body implants, and hand-held electronics have tight
energy budgets that necessitate low power circuits. Most of these devices include an analog …

In this paper, a level-crossing analog-to-digital converter is described. It can convert audio
bandwidth signals with high resolution using few threshold levels and digital interpolation …

This paper proposes a new timing storage circuit based on memristors. Its ability to store and
reproduce timing information in an analog manner without performing quantization can be …

This paper illustrates an architectural design of a novel variable input-feature correlated
asynchronous sampling and time-encoded digitization approach for source compression …

This paper discusses the design of an asynchronous analog-to-digital converter targeted for
low-power sensing applications. The asynchronous sampling scheme will save power …

This paper describes a mixed-signal ECG processing platform with an 12-bit ADC
architecture that can adapt its sampling rate according to the input signals rate of change …

Considering the power-hungry nature of speech processing, a keyword spotting (KWS) unit,
used to detect multiple spoken words, is often integrated as a front-end layer. KWS systems …

This paper presents a spike time event coding scheme for transmission of analog signals
between configurable analog blocks (CABs) in a programmable analog array. The analog …