The integration of various two-dimensional (2D) materials on wafers enables a more-than-
Moore approach for enriching the functionalities of devices,–. On the other hand, the additive …

Abstract 3D monolithic integration of logic and memory has been the most sought after
solution to surpass the Von Neumann bottleneck, for which a low-temperature processed …

For next-generation system-on-chips (SoCs) in diverse applications (RF, sensor, display,
etc.) which require high-performance, small form factors, and low power consumption …

An overview is presented of the significant influences of Moore's Law scaling on radiation
effects on microelectronics, focusing on historical trends and future needs. A number of …

The engineering of a compact qubit unit cell that embeds all quantum functionalities is
mandatory for large-scale integration. In addition, these functionalities should present the …

Three-dimensional (3D) packaging using through-Si-via (TSV) is a key technique for
achieving high-density integration, high-speed connectivity, and for downsizing of electronic …

Two-dimensional transition metal dichalcogenides, such as MoS2, are intensely studied for
applications in electronics. However, the difficulty of depositing large-area films of sufficient …

We report on vertically stacked lateral nanowires (NW)/nanosheets (NS) gate-all-around
(GAA) FET devices as promising candidates to obtain a better power-performance metric for …

In this work, we present a comprehensive theoretical and experimental study of quantum
confinement in layered platinum diselenide (PtSe2) films as a function of film thickness. Our …

As a powerful enabling technology, three-dimensional (3D) integration, which uses wafer
bonding to integrate multiple wafers in the vertical direction and uses through‑silicon-vias …