Skyline computation has many applications including multi-criteria decision making. In this
paper, we study the problem of selecting k skyline points so that the number of points, which …

Due to the high integration density and roadblock of voltage scaling, modern multicore
processors experience higher power densities than previous technology scaling nodes …

Network-on-Chips (NoCs) are the de facto choice for designing the interconnect fabric in
multicore chips due to their regularity, efficiency, simplicity, and scalability. However, NoC …

Network-on-chip (NoC) has become a critical shared resource in the emerging Chip
Multiprocessor (CMP) era. Most prior NoC designs have used the same type of router across …

The increase in on-chip core counts in Chip Multi Processors (CMPs) has led to the adoption
of interconnects such as Mesh and Torus, which consume an increasing fraction of the chip …

As the popularity of graphics processing units (GPUs) grows rapidly in recent years, it
becomes very critical to study and understand the security implications imposed by them. In …

With increasing core counts in Chip Multi-Processor (CMP) designs, the size of the on-chip
communication fabric and shared Last-Level Caches (LLC), which we term uncore here, is …

As the core count in processor chips grows, so do the on-die, shared resources such as on-
chip communication fabric and shared cache, which are of paramount importance for chip …

In chip design today and for a foreseeable future, the last-level cache and on-chip
interconnect is not only performance critical but also a substantial power consumer. This …

This research presents a forensics application of matching two latent fingerprints. In crime
scene settings, it is often required to match multiple latent fingerprints. Unlike matching latent …