Learning a convolutional neural network for non-uniform motion blur removal
In this paper, we address the problem of estimating and removing non-uniform motion blur
from a single blurry image. We propose a deep learning approach to predicting the …
from a single blurry image. We propose a deep learning approach to predicting the …
Circuit failure prediction and its application to transistor aging
M Agarwal, BC Paul, M Zhang… - 25th IEEE VLSI Test …, 2007 - ieeexplore.ieee.org
Circuit failure prediction predicts the occurrence of a circuit failure before errors actually
appear in system data and states. This is in contrast to classical error detection where a …
appear in system data and states. This is in contrast to classical error detection where a …
Facelift: Hiding and slowing down aging in multicores
A Tiwari, J Torrellas - 2008 41st IEEE/ACM International …, 2008 - ieeexplore.ieee.org
Processors progressively age during their service life due to normal workload activity. Such
aging results in gradually slower circuits. Anticipating this fact, designers add timing …
aging results in gradually slower circuits. Anticipating this fact, designers add timing …
Assessment of circuit optimization techniques under NBTI
This paper conducts a comprehensive study on existing circuit optimization techniques
against NBTI, degradation mechanism that has become a critical reliability issue for nano …
against NBTI, degradation mechanism that has become a critical reliability issue for nano …
Impacts of NBTI/PBTI on timing control circuits and degradation tolerant design in nanoscale CMOS SRAM
HI Yang, SC Yang, W Hwang… - IEEE Transactions on …, 2011 - ieeexplore.ieee.org
Negative-bias temperature instability (NBTI) and positive-bias temperature instability (PBTI)
weaken PFET and NFET over the lifetime of usage, leading to performance and reliability …
weaken PFET and NFET over the lifetime of usage, leading to performance and reliability …
Aging-aware logic synthesis
As CMOS technology scales down into the nanometer regime, designers have to add
pessimistic timing margins to the circuit as guardbands to avoid timing violations due to …
pessimistic timing margins to the circuit as guardbands to avoid timing violations due to …
NBTI-aware flip-flop characterization and design
H Abrishami, S Hatami, B Amelifard… - Proceedings of the 18th …, 2008 - dl.acm.org
With the scaling down of the CMOS technologies, Negative Bias Temperature Instability
(NBTI) has become a major concern due to its impact on PMOS transistor aging process and …
(NBTI) has become a major concern due to its impact on PMOS transistor aging process and …
Estimating and mitigating aging effects in routing network of FPGAs
In this paper, we present a comprehensive analysis of the impact of aging on the
interconnection network of field-programmable gate arrays (FPGAs) and propose novel …
interconnection network of field-programmable gate arrays (FPGAs) and propose novel …
BTI, HCI and TDDB aging impact in flip–flops
This work presents a comparative analysis of aging impact in CMOS flip–flops. Five different
static flip–flop topologies have been evaluated based on an aging estimation method …
static flip–flop topologies have been evaluated based on an aging estimation method …
Aging-aware reliable multiplier design with adaptive hold logic
C Lin, YH Cho, YM Yang - IEEE Transactions on Very Large …, 2014 - ieeexplore.ieee.org
Digital multipliers are among the most critical arithmetic functional units. The overall
performance of these systems depends on the throughput of the multiplier. Meanwhile, the …
performance of these systems depends on the throughput of the multiplier. Meanwhile, the …