Comprehensive survey of ternary full adders: Statistics, corrections, and assessments
S Nemati, M Haghi Kashani… - IET Circuits, Devices & …, 2023 - Wiley Online Library
The history of ternary adders goes back to more than 6 decades ago. Since then, a multitude
of ternary full adders (TFAs) have been presented in the literature. This article conducts a …
of ternary full adders (TFAs) have been presented in the literature. This article conducts a …
Energy efficient design of unbalanced ternary logic gates and arithmetic circuits using CNTFET
T Khurshid, V Singh - AEU-International Journal of Electronics and …, 2023 - Elsevier
The emergence of multi-valued logic (MVL) is a substitute to binary logic approaches for
realizing high-information density logic systems and high-operating speed systems. In this …
realizing high-information density logic systems and high-operating speed systems. In this …
Method for designing ternary adder cells based on CNFETs
Recently multiple valued logic has attracted the attention of digital system designers.
Scalable threshold voltage values of carbon nanotube field‐effect transistors (CNFETs) can …
Scalable threshold voltage values of carbon nanotube field‐effect transistors (CNFETs) can …
High performance, variation-tolerant CNFET ternary full adder a process, voltage, and temperature variation-resilient design
Multiple-valued logic (MVL) decreases interconnection requirement and power consumption
by realizing more data transmission over an interconnection wire. This paper investigates …
by realizing more data transmission over an interconnection wire. This paper investigates …
A novel ternary half adder and multiplier based on carbon nanotube field effect transistors
S Tabrizchi, N Azimi, K Navi - Frontiers of Information Technology & …, 2017 - Springer
A lot of research has been done on multiple-valued logic (MVL) such as ternary logic in
these years. MVL reduces the number of necessary operations and also decreases the chip …
these years. MVL reduces the number of necessary operations and also decreases the chip …
A novel low power ternary multiplier design using cnfets
Carbon Nanotube Field Effect Transistors (CNFETs) are considered to be an ideal choice for
implementation of Multi-valued logic circuits, as by using CNFETs multiple thresholds can be …
implementation of Multi-valued logic circuits, as by using CNFETs multiple thresholds can be …
A low power and energy efficient 4: 2 precise compressor based on novel 14T hybrid full adders in 10 nm wrap gate CNTFET technology
MKQ Jooq, A Bozorgmehr, S Mirzakuchaki - Microelectronics Journal, 2020 - Elsevier
In the realm of VLSI circuits, addition and multiplication are the most pivotal operators in
arithmetic units. In this regard, this work aims to propose an energy efficient 4: 2 precise …
arithmetic units. In this regard, this work aims to propose an energy efficient 4: 2 precise …
[PDF][PDF] High-performance ternary (4: 2) compressor based on capacitive threshold logic
RF Mirzaee, A Reza - International Journal of Electronics and …, 2017 - bibliotekanauki.pl
This paper presents a ternary (4: 2) compressor, which is an important component in
multiplication. However, the structure differs from the binary counterpart since the ternary …
multiplication. However, the structure differs from the binary counterpart since the ternary …
A novel method for reduction partial product tree in ternary multiplier
In this paper, a new method for multiplying two n-trit numbers using CNFET and ternary logic
is introduced. The carry resulted from the ternary multiplier never takes the value of two and …
is introduced. The carry resulted from the ternary multiplier never takes the value of two and …
Efficient ternary compressor design using capacitive threshold logic in CNTFET technology
T Sharma, L Kumre - IETE Journal of Research, 2023 - Taylor & Francis
Ternary logic is a promising alternative to classical binary logic as it offers the benefits of
reduced interconnect, higher operating speed and smaller chip area. In this paper, a new …
reduced interconnect, higher operating speed and smaller chip area. In this paper, a new …