Nonvolatile multistates memories for high-density data storage
In the current information age, the realization of memory devices with energy efficient
design, high storage density, nonvolatility, fast access, and low cost is still a great challenge …
design, high storage density, nonvolatility, fast access, and low cost is still a great challenge …
A large-scale empirical study on self-admitted technical debt
Technical debt is a metaphor introduced by Cunningham to indicate" not quite right code
which we postpone making it right". Examples of technical debt are code smells and bug …
which we postpone making it right". Examples of technical debt are code smells and bug …
A survey of phase change memory systems
As the scaling of applications increases, the demand of main memory capacity increases in
order to serve large working set. It is difficult for DRAM (dynamic random access memory) …
order to serve large working set. It is difficult for DRAM (dynamic random access memory) …
Compex++ compression-expansion coding for energy, latency, and lifetime improvements in mlc/tlc nvms
PM Palangappa, K Mohanram - ACM Transactions on Architecture and …, 2017 - dl.acm.org
Multilevel/triple-level cell nonvolatile memories (MLC/TLC NVMs) such as phase-change
memory (PCM) and resistive RAM (RRAM) are the subject of active research and …
memory (PCM) and resistive RAM (RRAM) are the subject of active research and …
FPB: Fine-grained power budgeting to improve write throughput of multi-level cell phase change memory
As a promising nonvolatile memory technology, Phase Change Memory (PCM) has many
advantages over traditional DRAM. Multi-level Cell PCM (MLC) has the benefit of increased …
advantages over traditional DRAM. Multi-level Cell PCM (MLC) has the benefit of increased …
Morlog: Morphable hardware logging for atomic persistence in non-volatile main memory
Byte-addressable non-volatile memory (NVM) is emerging as an alternative for main
memory. Non-volatile main memory (NVMM) systems are required to support atomic …
memory. Non-volatile main memory (NVMM) systems are required to support atomic …
Bit mapping for balanced PCM cell programming
Write bandwidth is an inherent performance bottleneck for Phase Change Memory (PCM) for
two reasons. First, PCM cells have long programming time, and second, only a limited …
two reasons. First, PCM cells have long programming time, and second, only a limited …
Low power multi-level-cell resistive memory design with incomplete data mapping
Phase change memory (PCM) has been widely studied as a potential DRAM alternative.
The multi-level cell (MLC) can further increase the memory density and reduce the …
The multi-level cell (MLC) can further increase the memory density and reduce the …
ER: Elastic RESET for low power and long endurance MLC based phase change memory
Phase Change Memory (PCM) has recently emerged as a promising nonvolatile memory
technology. To effectively increase memory capacity and reduce per bit fabrication cost …
technology. To effectively increase memory capacity and reduce per bit fabrication cost …
A low power and reliable charge pump design for phase change memories
The emerging Phase Change Memory (PCM) technology exhibits excellent scalability and
density potentials. At the same time, they require high current and high voltages to switch …
density potentials. At the same time, they require high current and high voltages to switch …