System and method for increasing capacity, performance, and flexibility of flash storage
R Danilak, MJS Smith, S Rajan - US Patent 8,055,833, 2011 - Google Patents
In one embodiment, an interface circuit is configured to couple to one or more flash memory
devices and is further configured to couple to a host system. The interface circuit is …
devices and is further configured to couple to a host system. The interface circuit is …
Memory systems and memory modules
MJS Smith, SN Rajan - US Patent 8,060,774, 2011 - Google Patents
One embodiment of the present invention sets forth a memory module that includes at least
one memory chip, and an intelligent chip coupled to the at least one memory chip and a …
one memory chip, and an intelligent chip coupled to the at least one memory chip and a …
Memory module with memory stack and interface with enhanced capabilities
SN Rajan, KR Schakel, MJS Smith, DT Wang… - US Patent …, 2012 - Google Patents
A memory module, which includes at least one memory stack, comprises a plurality of DRAM
integrated circuits and an interface circuit. The interface circuit interfaces the memory stack …
integrated circuits and an interface circuit. The interface circuit interfaces the memory stack …
Memory module with memory stack
SN Rajan, FD Weber - US Patent App. 11/702,960, 2008 - Google Patents
BACKGROUND 0002 1. Field of the Invention 0003. The present invention is directed
toward the field of building custom memory systems cost-effectively for a wide range of …
toward the field of building custom memory systems cost-effectively for a wide range of …
Memory module decoder
JR Bhakta, JC Solomon - US Patent 7,619,912, 2009 - Google Patents
A memory module connectable to a computer system includes a printed circuit board, a
plurality of memory devices coupled to the printed circuit board, and a logic element coupled …
plurality of memory devices coupled to the printed circuit board, and a logic element coupled …
Memory circuit system and method
SN Rajan, KR Schakel, MJS Smith, DT Wang… - US Patent …, 2012 - Google Patents
Continuation of application No. PCT/US2007/016385, filed on Jul. 18, 2007, which is a
continuation-in-part of application No. 1 1/461,439, filed on Jul. 31, 2006, and a continuation …
continuation-in-part of application No. 1 1/461,439, filed on Jul. 31, 2006, and a continuation …
Apparatus and method for power management of memory circuits by a system or component thereof
SN Rajan, MJ Smith, DT Wang - US Patent 8,122,207, 2012 - Google Patents
An apparatus and method are provided for communicating with a plurality of physical
memory circuits. In use, at least one virtual memory circuit is simulated where at least one …
memory circuits. In use, at least one virtual memory circuit is simulated where at least one …
Adjusting the timing of signals associated with a memory system
MJS Smith, DL Rosenband, DT Wang… - US Patent …, 2012 - Google Patents
A system and method are provided for adjusting the timing of signals associated with a
memory system. A memory controller is provided. Additionally, at least one memory module …
memory system. A memory controller is provided. Additionally, at least one memory module …
System and method utilizing distributed byte-wise buffers on a memory module
H Lee, JR Bhakta - US Patent 8,516,185, 2013 - Google Patents
A memory system and method utilizing one or more memory modules is provided. The
memory module includes a plurality of memory devices and a controller configured to …
memory module includes a plurality of memory devices and a controller configured to …
Methods and apparatus of stacking DRAMs
SN Rajan, MJS Smith, DT Wang - US Patent 8,619,452, 2013 - Google Patents
US8619452B2 - Methods and apparatus of stacking DRAMs - Google Patents US8619452B2 -
Methods and apparatus of stacking DRAMs - Google Patents Methods and apparatus of …
Methods and apparatus of stacking DRAMs - Google Patents Methods and apparatus of …