Quantum error correction codes (QECCs) can be constructed from the known classical
coding paradigm by exploiting the inherent isomorphism between the classical and quantum …

A phased-array transmitter (TX) for multi-Gb/s non-line-of-sight links in the four frequency
channels of the IEEE 802.15. 3c standard (58.32 to 64.8 GHz) is fully integrated in a 0.12-μm …

A new stochastic decoding algorithm, called Delayed Stochastic (DS) decoding, is
introduced to implement low-density-parity-check (LDPC) decoders. The delayed stochastic …

An ultrahigh throughput low-density parity-check (LDPC) decoder with an unrolled full-
parallel architecture is proposed, which achieves the highest decoding throughput …

Low-density parity-check (LDPC) codes are key ingredients for improving reliability of
modern communication systems and storage devices. On the implementation side however …

In modern communication systems the required data rates are continuously increasing. High
speed transmissions can easily generate throughputs far beyond 1 Tbit/s. To ensure error …

Belief propagation (BP) is a high-throughput, low-latency decoding algorithm for polar
codes, but the error-correcting performance is known to be inferior than successive …

We propose without loss of generality strategies to achieve a high-throughput FPGA-based
architecture for a binary Quasi-Cyclic Low-Density Parity-Check (QC-LDPC) code based on …

Configurable permutators in an LDPC decoder are provided. A partially-parallel architecture
combined with the proposed permutators is used to mitigate the increase in implementa tion …

For an efficient multimode low-density parity-check (LDPC) decoder, most hardware
resources, such as permutators, should be shared among different modes. Although an …