RTL conversion method from pipelined synchronous RTL models into asynchronous ones

S Semba, H Saito - IEEE Access, 2022 - ieeexplore.ieee.org
In this paper, we propose a conversion method from pipelined synchronous Register
Transfer Level (RTL) models into pipelined asynchronous RTL models with bundled-data …

Validating an automated asynchronous synthesis environment with a challenging design: Risc-v

WA Nunes, MLL Sartori, MT Moreira… - 2023 36th SBC …, 2023 - ieeexplore.ieee.org
The coupling of synchronous digital design techniques with electronic design automation
tools and support systems ensured several decades of steadfast evolution of electronics …

[PDF][PDF] Robust and energy-efficient hardware: the case for asynchronous design

NLV Calazans, TA Rodolfo… - JICS. JOURNAL OF …, 2021 - meriva.pucrs.br
Current technologies behind the design of semiconductor integrated circuits allow
embedding components in the order of billions in a singe die. This enables the construction …

Components to Support Choice in Self-Timed Asynchronous Design Flows

MLL Sartori, WA Nunes, NLV Calazans - Journal of Integrated Circuits …, 2023 - jics.org.br
The design of digital circuits on recent technologies brings several challenges, among which
robustness to variations stands out. Variation sources are multiple, and the evolution of …

Asynchronous Circuit Principles and a Survey of Associated Design Tools

NLV Calazans, M Sartori - Journal of Integrated Circuits and Systems, 2022 - jics.org.br
Planning and implementing a semiconductor integrated circuit is a highly complex process.
Although physical limits seem to be approaching, it currently follows a growing evolutionary …

Enhancing an Asynchronous Circuit Design Flow to Support Complex Digital System Design

MLL Sartori, WA Nunes… - 2022 35th SBC/SBMicro …, 2022 - ieeexplore.ieee.org
Robustness to variations is desirable in current digital circuit design techniques. Sources of
variations are many, and the evolution of current integrated circuit fabrication technologies …

Flot de conception pour circuits asynchrones: de la HLS à l'implémentation en FDSOI

Y Decoudu - 2022 - theses.hal.science
La consommation est désormais une préoccupation majeure de l'industrie
microélectronique, notamment avec l'émergence des objets de l'internet et de dispositifs …

[PDF][PDF] PUC-RS5: A RISC-V processor core for embedded uses

WA Nunes - 2022 - repositorio.pucrs.br
The RISC-V architecture is modular and extensible, being versatile enough to apply in
multiple uses. The ability to service interrupts and handle exceptions is essential in …

[PDF][PDF] 同期式RTL モデルから非同期式RTL モデルへの自動変換

仙波翔吾, センバショウゴ - u-aizu.repo.nii.ac.jp
Automatic Conversion from Synchronous RTL Models to Asynchronous RTL Models Page 1 A
dissertation submitted in partial satisfaction of the requirements for the degree of Doctor of …