A 28nm configurable asynchronous SNN accelerator with energy-efficient learning
In this paper, we put forward an energy-efficient configurable asynchronous SNN
accelerator for energy-constrained applications, which includes 256 neurons and 131K …
accelerator for energy-constrained applications, which includes 256 neurons and 131K …
An Ultra-Low Cost and Multicast-Enabled Asynchronous NoC for Neuromorphic Edge Computing
Z Su, S Ramini, DC Marcolin, A Veronesi… - IEEE Journal on …, 2024 - ieeexplore.ieee.org
Biological brains are increasingly taken as a guide toward more efficient forms of computing.
The latest frontier considers the use of spiking neural-network-based neuromorphic …
The latest frontier considers the use of spiking neural-network-based neuromorphic …
A low-power asynchronous RISC-V processor with propagated timing constraints method
Z Li, Y Huang, L Tian, R Zhu, S Xiao… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
Over the past decade, the design of low-power processors is a primary requirement of
emerging applications, as Internet of Things (IoT) and neuromorphic chips. Therefore, there …
emerging applications, as Internet of Things (IoT) and neuromorphic chips. Therefore, there …
An efficient asynchronous circuits design flow with backward delay propagation constraint
L Zhou, S Xiao, H Wang, J Wang, Z Xu… - … , Automation & Test …, 2024 - ieeexplore.ieee.org
Asynchronous circuits have recently become more popular in Internet of Things (IoT) and
neural network chips because of their potential low power consumption. However, due to the …
neural network chips because of their potential low power consumption. However, due to the …
An asynchronous bundled-data template with current sensing completion detection technique
Y Huang, S Xiao, Z Li, Z Yu - IEEE Transactions on Circuits and …, 2022 - ieeexplore.ieee.org
An asynchronous circuit design paradigm can address the increasing energy efficiency and
speed demands of portable electronic devices. However, designing a low-cost event-driven …
speed demands of portable electronic devices. However, designing a low-cost event-driven …
Low-latency masking with arbitrary protection order based on click elements
M Simões, L Bossuet, N Bruneau… - … Security and Trust …, 2023 - ieeexplore.ieee.org
Masking is the main countermeasure against side-channel attacks due to its sound formal
proof of security and the scalability of its protection parameters. However, effective masking …
proof of security and the scalability of its protection parameters. However, effective masking …
An End-to-End Bundled-Data Asynchronous Circuits Design Flow: From RTL to GDS
J Wang, S Xiao, J Luo, B Li, L Zhou… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
Asynchronous circuits with low power and robustness are revived in emerging applications
such as the Internet of Things (IoT) and neuromorphic chips, thanks to clock-less and event …
such as the Internet of Things (IoT) and neuromorphic chips, thanks to clock-less and event …
Better-Than-Worst-Case: A Frequency Adaptation Asynchronous RISC-V Core With Vector Extension
L Zhou, S Xiao, H Wang, J Wang, Z Xu… - … Transactions on Very …, 2024 - ieeexplore.ieee.org
In recent years, asynchronous circuits have become more popular in neural network chips
and the Internet of Things (IoT) due to their potential advantages of low-power consumption …
and the Internet of Things (IoT) due to their potential advantages of low-power consumption …
Toward Efficient Asynchronous Circuits Design Flow Using Backward Delay Propagation Constraint
L Zhou, S Xiao, H Wang, J Wang, Z Xu… - … Transactions on Very …, 2024 - ieeexplore.ieee.org
In recent years, asynchronous circuits have gained attention in neural network chips and
Internet of Things (IoT) due to their potential advantages of low power and high …
Internet of Things (IoT) due to their potential advantages of low power and high …
HPSAP: A High-Performance and Synthesizable Asynchronous Pipeline With Quasi-2phase Conversion Method
X Tang, J Wang, Y Li, J Hu, F Xia, D Shang - IEEE Access, 2023 - ieeexplore.ieee.org
This paper presents a high-performance and synthesizable asynchronous pipeline
(HPSAP). First, a 4-phase pipeline controlled by the relative-timing (RT) controller is …
(HPSAP). First, a 4-phase pipeline controlled by the relative-timing (RT) controller is …