Electrical interconnects are becoming a bottleneck in the way towards meeting future
performance requirements of integrated circuits. Moore's law, which observes the doubling …

Silicon photonics has become a commonly used paradigm for on-chip interconnects to meet
the requirements of higher bandwidth in computationally intensive applications for manycore …

Optical network on chip (ONoC) has evolved as an innovative technology for on-chip
interconnects that can fulfill the upcoming requirements of manycore processors used in …

Network-on-Chips are a critical part of modernmultiprocessors and their relevance will grow
with the number ofcores. The development of future NoC designs relies on …

Abstract Objectives: Network on Chip (NoC) has been emerging area as communication is
very complex at Chip Multi Processor and it has become more popular due to its high …

It is known that an indirect network with a small host-to-host Average Shortest Path Length (h-
ASPL) improves overall system performance in a parallel computer system. As a means to …

The implementation of high-volume calculations requires the use of high-performance
computer systems, incl. based on multiple processing in MIMD architectures. A group of …

The Order/Radix Problem (ORP) is an optimization problem that can be solved to find an
optimal network topology in distributed memory systems. It is important to find the optimum …

Binary tree topology generally fails to attract network on chip (NoC) implementations due to
its low bisection bandwidth. Fat trees are proposed to alleviate this issue by using …

Increasing complexity of design and the need for separation of computing and
communication areas in chips has directed the chip design techniques toward Network-On …