A 0.5–1 V,− 68 dB power supply rejection capacitorless analog LDO using voltage-to-time conversion in 28-nm CMOS
JH Jang, HD Gwon, TH Kong, JH Yang… - IEEE Journal of Solid …, 2022 - ieeexplore.ieee.org
This article proposes an analog low-dropout (LDO) regulator using the voltage-to-time
conversion technique to achieve high power-supply-rejection (PSR) at low supply voltages …
conversion technique to achieve high power-supply-rejection (PSR) at low supply voltages …
A 4-GS/s 10-ENOB 75-mW ringamp ADC in 16-nm CMOS with background monitoring of distortion
B Hershberg, D Dermit, B van Liempd… - IEEE Journal of Solid …, 2021 - ieeexplore.ieee.org
A interleaved pipelined ADC for direct-RF sampling applications is presented. It leverages
the performance advantages of ring amplifiers to unlock greater architectural freedom. The …
the performance advantages of ring amplifiers to unlock greater architectural freedom. The …
Architectural advancement of digital low-dropout regulators
Digital Low-dropout (DLDO) regulators have been widely utilised for highly-efficient fine-
grained power delivery and management in system-on-chips (SoCs) due to their process …
grained power delivery and management in system-on-chips (SoCs) due to their process …
A fast droop-recovery event-driven digital LDO with adaptive linear/binary two-step search for voltage regulation in advanced memory
This letter presents an event-driven digital low-dropout regulator (DLDO) with an adaptive
linear/binary two-step search achieving a fast transient response. A two-dimensional (2-D) …
linear/binary two-step search achieving a fast transient response. A two-dimensional (2-D) …
An output-capacitorless analog LDO featuring frequency compensation of four-stage amplifier
In this paper, we propose an output-capacitorless analog low-dropout voltage regulator
(ALDO) featuring frequency compensation of a four-stage amplifier consisting of a three …
(ALDO) featuring frequency compensation of a four-stage amplifier consisting of a three …
BlitzCoin: Fully Decentralized Hardware Power Management for Accelerator-Rich SoCs
On-chip power-management techniques have evolved over several processor generations.
However, response time and scalability constraints have made it difficult to translate existing …
However, response time and scalability constraints have made it difficult to translate existing …
Current context and research trends in linear dc–dc converters
With the introduction of switch-mode power supplies (SMPS) in the mid-1970s, the efficiency
of DC–DC conversion rose from 60 to 80% and SMPS became a popular power supply …
of DC–DC conversion rose from 60 to 80% and SMPS became a popular power supply …
A low-voltage and power-efficient capless LDO based on the biaxially driven power transistor technique for respiration monitoring system
Y Wang, Z Shu, Q Zhang, X Zhao… - … Circuits and Systems, 2022 - ieeexplore.ieee.org
In this study, a 0.8-V-200-mA-capless low-dropout voltage regulator (LDO) is developed for
a wireless respiration monitoring system. The biaxially driven power transistor (BDP) …
a wireless respiration monitoring system. The biaxially driven power transistor (BDP) …
Dynamically controllable current reference technique for current-feedback low dropout regulator
X Wang, J Yan, X Zhao, Q Zhang, Y Xin, L Dong… - … -International Journal of …, 2023 - Elsevier
This paper proposes the dynamically controllable current reference (DCCR) technique for a
wide input range, transient enhancement current-feedback low dropout regulator (WTELDO) …
wide input range, transient enhancement current-feedback low dropout regulator (WTELDO) …
A residue-current-locked hybrid low-dropout regulator supporting ultralow dropout of sub-50 mV with fast settling time below 10 ns
This article proposes a fully integrated hybrid low-dropout regulator (HLDO) that features an
ultralow dropout and a highly improved transient response. This HLDO incorporates a …
ultralow dropout and a highly improved transient response. This HLDO incorporates a …