Compiling for reconfigurable computing: A survey
Reconfigurable computing platforms offer the promise of substantially accelerating
computations through the concurrent nature of hardware structures and the ability of these …
computations through the concurrent nature of hardware structures and the ability of these …
[图书][B] Reconfigurable computing: the theory and practice of FPGA-based computation
Reconfigurable Computing marks a revolutionary and hot topic that bridges the gap
between the separate worlds of hardware and software design—the key feature of …
between the separate worlds of hardware and software design—the key feature of …
Reconfigurable computing for digital signal processing: A survey
R Tessier, W Burleson - Journal of VLSI signal processing systems for …, 2001 - Springer
Steady advances in VLSI technology and design tools have extensively expanded the
application domain of digital signal processing over the past decade. While application …
application domain of digital signal processing over the past decade. While application …
FPGAs vs. CPUs: trends in peak floating-point performance
K Underwood - Proceedings of the 2004 ACM/SIGDA 12th …, 2004 - dl.acm.org
Moore's Law states that the number of transistors on a device doubles every two years;
however, it is often (mis) quoted based on its impact on CPU performance. This important …
however, it is often (mis) quoted based on its impact on CPU performance. This important …
Analysis of high-performance floating-point arithmetic on FPGAs
G Govindu, L Zhuo, S Choi… - 18th International Parallel …, 2004 - ieeexplore.ieee.org
Summary form only given. FPGAs are increasingly being used in the high performance and
scientific computing community to implement floating-point based hardware accelerators …
scientific computing community to implement floating-point based hardware accelerators …
Internal bus system for DFPS and units with two-or multi-dimensional programmable cell architectures, for managing large volumes of data with a high interconnection …
M Vorbach, R Münch - US Patent 7,010,667, 2006 - Google Patents
An internal bus system for DFPs and units with two-or multi-dimensional programmable cell
architectures, for managing large Volumes of data with a high interconnection complexity …
architectures, for managing large Volumes of data with a high interconnection complexity …
Implementation of single precision floating point square root on FPGAs
Y Li, W Chu - Proceedings. The 5th Annual IEEE Symposium …, 1997 - ieeexplore.ieee.org
The square root operation is hard to implement on FPGAs because of the complexity of the
algorithms. In this paper, we present a non-restoring square root algorithm and two very …
algorithms. In this paper, we present a non-restoring square root algorithm and two very …
Implementation of IEEE single precision floating point addition and multiplication on FPGAs
Louca - 1996 Proceedings IEEE Symposium on FPGAs for …, 1996 - ieeexplore.ieee.org
Floating point operations are hard to implement on FPGAs because of the complexity of their
algorithms. On the other hand, many scientific problems require floating point arithmetic with …
algorithms. On the other hand, many scientific problems require floating point arithmetic with …
Closing the gap: CPU and FPGA trends in sustainable floating-point BLAS performance
KD Underwood, KS Hemmert - 12th Annual IEEE Symposium …, 2004 - ieeexplore.ieee.org
Field programmable gate arrays (FPGAs) have long been an attractive alternative to
microprocessors for computing tasks-as long as floating-point arithmetic is not required …
microprocessors for computing tasks-as long as floating-point arithmetic is not required …
An efficient implementation of floating point multiplier
M Al-Ashrafy, A Salem, W Anis - 2011 Saudi International …, 2011 - ieeexplore.ieee.org
In this paper we describe an efficient implementation of an IEEE 754 single precision
floating point multiplier targeted for Xilinx Virtex-5 FPGA. VHDL is used to implement a …
floating point multiplier targeted for Xilinx Virtex-5 FPGA. VHDL is used to implement a …