Decimal multiplication is the most common operation in arithmetic applications. This paper
presents an area-efficient digit-by-digit decimal multiplier using a modified binary-coded …

Decimal multiplication is a ubiquitous operation which is inherently complex in terms of
partial product generation and accumulation. In this paper, the authors propose a …

The goal of this paper is to implement multiplier and squarer of some particular numbers of
the form (10 l±m), where l and m are positive integers and the implementation of the …

Abstract In the Internet of Things era, with millions of devices performing financial and
commercial operations, decimal arithmetic has become very popular in the computation of …

The binary coded decimal (BCD) system is suitable for digital communication, which can be
designed by field programmable gate array (FPGA) technology, where look up table (LUT) is …

combinational multipliers operate fast but require a significant amount of silicon area. as
area is an important consideration, it can be reduced at the expense of performance by …

Decimal arithmetic in the form of binary coded decimal (BCD) numbers is preferred in many
financial, commercial and scientific applications. BCD multipliers are introduced as a key …

Combinational multipliers operate fast but require a significant amount of silicon area. As
area is an important consideration, it can be reduced at the expense of performance by …

The objective of this work is to implement a scalable decimal to binary converter from 8 to 64
bits (ie 2-digit to 16-digit) using parallel architecture. The proposed converters, along with …

Very Large-Scale Integration (VLSI) creates an integrated circuit (IC) by combining
thousands of transistors into a single chip. While designing a circuit, reduction of power …