Firefly: Illuminating future network-on-chip with nanophotonics
Future many-core processors will require high-performance yet energy-efficient on-chip
networks to provide a communication substrate for the increasing number of cores. Recent …
networks to provide a communication substrate for the increasing number of cores. Recent …
Scalable hybrid wireless network-on-chip architectures for multicore systems
Multicore platforms are emerging trends in the design of System-on-Chips (SoCs).
Interconnect fabrics for these multicore SoCs play a crucial role in achieving the target …
Interconnect fabrics for these multicore SoCs play a crucial role in achieving the target …
Design of an energy-efficient CMOS-compatible NoC architecture with millimeter-wave wireless interconnects
The Network-on-chip (NoC) is an enabling technology to integrate large numbers of
embedded cores on a single die. The existing methods of implementing a NoC with planar …
embedded cores on a single die. The existing methods of implementing a NoC with planar …
Performance evaluation and design trade-offs for wireless network-on-chip architectures
Massive levels of integration are making modern multicore chips all pervasive in several
domains. High performance, robustness, and energy-efficiency are crucial for the …
domains. High performance, robustness, and energy-efficiency are crucial for the …
Energy-efficient networks-on-chip architectures: Design and run-time optimization
Abstract Networks-on-Chip (NoC) architectures have become the mainstream
communication backbone of high-end processors and systems-on-chip (SoCs) after their …
communication backbone of high-end processors and systems-on-chip (SoCs) after their …
SMART: A single-cycle reconfigurable NoC for SoC applications
As technology scales, SoCs are increasing in core counts, leading to the need for scalable
NoCs to interconnect the multiple cores on the chip. Given aggressive SoC design targets …
NoCs to interconnect the multiple cores on the chip. Given aggressive SoC design targets …
Enhancing performance of network-on-chip architectures with millimeter-wave wireless interconnects
In a traditional Network-on-Chip (NoC), latency and power dissipation increase with system
size due to its inherent multi-hop communications. The performance of NoC communication …
size due to its inherent multi-hop communications. The performance of NoC communication …
ProNoC: A low latency network-on-chip based many-core system-on-chip prototyping platform
Abstract Network-on-chip (NoC) is an emerging interconnect infrastructure to address the
scalability limitation of conventional shared bus architecture for many-core system-on-chip …
scalability limitation of conventional shared bus architecture for many-core system-on-chip …
Improving energy efficiency in wireless network-on-chip architectures
Wireless Network-on-Chip (WiNoC) represents a promising emerging communication
technology for addressing the scalability limitations of future manycore architectures. In a …
technology for addressing the scalability limitations of future manycore architectures. In a …
Exploiting new interconnect technologies in on-chip communication
The continuing scaling of transistors has increased the number of cores available in current
processors, and the number of cores is expected to continue to increase. In such many core …
processors, and the number of cores is expected to continue to increase. In such many core …