[HTML][HTML] Vertical MoS2 transistors with sub-1-nm gate lengths
Ultra-scaled transistors are of interest in the development of next-generation electronic
devices,–. Although atomically thin molybdenum disulfide (MoS2) transistors have been …
devices,–. Although atomically thin molybdenum disulfide (MoS2) transistors have been …
[HTML][HTML] ASAP7: A 7-nm finFET predictive process design kit
We describe a 7-nm predictive process design kit (PDK) called the ASAP7 PDK, developed
in collaboration with ARM Ltd. for academic use. The PDK is realistic, based on current …
in collaboration with ARM Ltd. for academic use. The PDK is realistic, based on current …
Open cell library in 15nm freepdk technology
This paper presents the 15 nm FinFET-based Open Cell Library (OCL) and describes the
challenges in the methodology while designing a standard cell library for such advanced …
challenges in the methodology while designing a standard cell library for such advanced …
[图书][B] Fundamentals of tunnel field-effect transistors
During the last decade, there has been a great deal of interest in TFETs. To the best authors'
knowledge, no book on TFETs currently exists. The proposed book provides readers with …
knowledge, no book on TFETs currently exists. The proposed book provides readers with …
Energy and area efficient imprecise compressors for approximate multiplication at nanoscale
Approximate computing is a new paradigm for designing energy-efficient integrated circuits
at the nanoscale. In this paper, we propose efficient imprecise 4: 2 and 5: 2 compressors by …
at the nanoscale. In this paper, we propose efficient imprecise 4: 2 and 5: 2 compressors by …
Moore's law at 50: Are we planning for retirement?
G Yeric - 2015 IEEE International Electron Devices Meeting …, 2015 - ieeexplore.ieee.org
The Moore's Law era enjoyed a long run of lithographically-enabled pitch shrinking that
directly reduced the cost per (von Neumann) function, as well as system power and …
directly reduced the cost per (von Neumann) function, as well as system power and …
Rapid co-optimization of processing and circuit design to overcome carbon nanotube variations
Carbon nanotube field-effect transistors (CNFETs) are promising candidates for building
energy-efficient digital systems at highly scaled technology nodes. However, carbon …
energy-efficient digital systems at highly scaled technology nodes. However, carbon …
An integrated nanophotonic parallel adder
T Ishihara, A Shinya, K Inoue, K Nozaki… - ACM Journal on …, 2018 - dl.acm.org
Integrated optical circuits with nanophotonic devices have attracted significant attention due
to their low power dissipation and light-speed operation. With light interference and …
to their low power dissipation and light-speed operation. With light interference and …
An optical neural network architecture based on highly parallelized WDM-multiplier-accumulator
T Ishihara, J Shiomi, N Hattori… - 2019 IEEE/ACM …, 2019 - ieeexplore.ieee.org
Future applications such as anomaly detection in a network and autonomous driving require
extremely low, submicrosecond latency processing in pattern classification. Towards the …
extremely low, submicrosecond latency processing in pattern classification. Towards the …
Crosstalk analysis of coupled MLGNR interconnects with different types of repeater insertion
This paper investigates crosstalk (XT) analysis of emerging multi-layer graphene
nanoribbons (MLGNR) as chip interconnect material with different types of repeater …
nanoribbons (MLGNR) as chip interconnect material with different types of repeater …