Design of a Low-Noise Low Dropout Regulator for CMOS Pixel Sensors
S Zhan, L Xue-Kang, Z Ye, F Chong… - IEEE Access, 2024 - ieeexplore.ieee.org
A low-noise Low Dropout Regulator (LDO) is designed in a Semiconductor Manufacturing
International Corporation (SMIC) m process, aiming at supply of a clean and constant …
International Corporation (SMIC) m process, aiming at supply of a clean and constant …
基于负载跟踪技术的低漏失大电流LDO 的设计.
茅欣彧， 汪西虎， 姚和平… - Electronic Components & …, 2022 - search.ebscohost.com
为了满足便携式电子设备的需求, 设计了一种低漏失高稳定的LDO. 利用正反馈环路钳位电压,
获得高精度采样电流. 通过调整工作在深线性区的MOS 管的等效电阻, 产生跟踪负载电流的零点 …
获得高精度采样电流. 通过调整工作在深线性区的MOS 管的等效电阻, 产生跟踪负载电流的零点 …
A 0.73-to-1.71 V capacitor-less low-noise low-dropout regulator in 28-nm CMOS
L Wang, R Guo, J Bastl, J Meier… - … on Circuits and …, 2022 - ieeexplore.ieee.org
This paper presents a low-noise low-dropout regulator (LNLDO) implemented in a 28 nm
technology. The LNLDO features a two-stage architecture, using a low-pass filter with a very …
technology. The LNLDO features a two-stage architecture, using a low-pass filter with a very …
An External Cap-Less LDO with Low Noise and High Power Supply Rejection
This paper proposes a low output noise, high power supply rejection (PSR) external cap-
less low-dropout regulator (LDO). The proposed LDO adopts two-stage cascaded power …
less low-dropout regulator (LDO). The proposed LDO adopts two-stage cascaded power …
Modeling Power Supply Noise in RF SoCs
J Meier, F Menke, L Wang, T Lauber… - … on SMACD and 16th …, 2021 - ieeexplore.ieee.org
With rising integration densities and design complexities, the verification effort of modern
Systems-on-Chip is rising even faster. Additionally, with the shift towards digitalcentric …
Systems-on-Chip is rising even faster. Additionally, with the shift towards digitalcentric …
Design of High PSRR and Low Noise for LDO
Q Zhao, Q Lei, Y Chen, X Zhang - 2023 3rd International …, 2023 - ieeexplore.ieee.org
In this paper, a Low Dropout Regulator (LDO) with high Power Supply Rejection Ratio
(PSRR) and low noise is designed based on the SMIC 40nm CMOS process. The PSRR of …
(PSRR) and low noise is designed based on the SMIC 40nm CMOS process. The PSRR of …
A Low-Noise Fast-Startup Low-Dropout Regulator with Off-Chip Filter Capacitor
J Yan, S Liu, F Zou, Z Meng, S Song… - 2023 8th International …, 2023 - ieeexplore.ieee.org
In this paper, a low-noise fast-startup low-dropout regulator with off-chip filter capacitor is
presented, which is fabricated in a 180nm CMOS process. For achieving excellent output …
presented, which is fabricated in a 180nm CMOS process. For achieving excellent output …
[PDF][PDF] Design and verification methods or digital-centric RF circuits and systems
J Meier - 2022 - d-nb.info
1 Introduction of analog models for efficient co-simulation with digital circuits. Nevertheless,
the analog modeling capabilities are still limited and often focus on the main signal path …
the analog modeling capabilities are still limited and often focus on the main signal path …